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Searched refs:OP2 (Results 1 – 4 of 4) sorted by relevance

/arch/arm/kernel/
Dhw_breakpoint.c59 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument
60 case ((OP2 << 4) + M): \
61 ARM_DBG_READ(c0, c ## M, OP2, VAL); \
64 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument
65 case ((OP2 << 4) + M): \
66 ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \
69 #define GEN_READ_WB_REG_CASES(OP2, VAL) \ argument
70 READ_WB_REG_CASE(OP2, 0, VAL); \
71 READ_WB_REG_CASE(OP2, 1, VAL); \
72 READ_WB_REG_CASE(OP2, 2, VAL); \
[all …]
/arch/arm/include/asm/
Dhw_breakpoint.h105 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
106 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
109 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
110 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
/arch/arm64/include/uapi/asm/
Dkvm.h190 ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
/arch/sparc/net/
Dbpf_jit_comp.c48 #define OP2(X) ((X) << 22) macro
52 #define F2(X, Y) (OP(X) | OP2(Y))