| /arch/blackfin/lib/ |
| D | smulsi3_highpart.S | 18 R2 = R1.L * R0.L (FU);
19 R3 = R1.H * R0.L (IS,M);
20 R0 = R0.H * R1.H, R1 = R0.H * R1.L (IS,M);
22 R1.L = R2.H + R1.L;
26 R1.L = R1.L + R3.L;
28 R1 >>>= 16;
30 R1 = R1 + R3; define
31 R1 = R1 + R2; define
33 R1 = R1 + R2; define
35 R0 = R0 + R1;
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| D | udivsi3.S | 20 CC = R0 < R1 (IU); /* If X < Y, always return 0 */
23 R2 = R1 << 16;
28 R3 = R1 >> 15; /* and Y is a 15-bit number */
47 DIVQ(R0, R1); // 1
48 DIVQ(R0, R1); // 2
49 DIVQ(R0, R1); // 3
50 DIVQ(R0, R1); // 4
51 DIVQ(R0, R1); // 5
52 DIVQ(R0, R1); // 6
53 DIVQ(R0, R1); // 7
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| D | divsi3.S | 39 R3 = R0 ^ R1;
57 DIVS(R0, R1);
58 DIVQ(R0, R1);
59 DIVQ(R0, R1);
60 DIVQ(R0, R1);
61 DIVQ(R0, R1);
62 DIVQ(R0, R1);
63 DIVQ(R0, R1);
64 DIVQ(R0, R1);
65 DIVQ(R0, R1);
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| D | memmove.S | 22 P3 = R1; /* P3 = From Address */
27 CC = R1 < R0 (IU); /* From < To */
29 R3 = R1 + R2;
36 R3 = R1 | R0; /* OR addresses together */
47 R1 = [I0++]; define
52 [P0++] = R1;
54 R1 = [I0++]; define
58 MNOP || [P0++] = R1 || R1 = [I0++];
60 [P0++] = R1;
69 .Lbyte2_s: R1 = B[P3++](Z);
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| D | umulsi3_highpart.S | 18 R2 = R1.H * R0.H, R3 = R1.L * R0.H (FU);
19 R0 = R1.L * R0.L, R1 = R1.H * R0.L (FU);
24 R0 = R0 + R1;
26 R1 = cc; define
27 R1 = PACK(R1.l,R0.h); define
28 R0 = R1 + R2;
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| D | memcmp.S | 24 P3 = R1; /* P3 = s2 Address */
28 I0 = R1; /* s2 */
29 R1 = R1 | R0; /* OR addresses together */ define
30 R1 <<= 30; /* check bottom two bits */
43 R1 = [I0++]; define
45 MNOP || R0 = [P0++] || R1 = [I0++];
47 CC = R0 == R1;
60 R1 = B[P3++](Z); /* *s2 */ define
62 CC = R0 == R1;
68 R0 = R0 - R1;
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| D | memcpy.S | 36 P1 = R1 ; /* src*/
40 CC = R1 < R0; /* src < dst */
42 R3 = R1 + R2;
49 R3 = R1 | R0;
50 R1 = 0x3; define
51 R3 = R3 & R1;
99 R1 = B[P1++] (X); define
101 B[P0++] = R1;
118 R1 = B[P1--] (X); define
120 B[P0--] = R1;
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| D | memset.S | 32 R1 = R1.B (Z); /* R1 = fill char */ define
40 R2 = R1 << 8; /* create quad filler */
41 R2.L = R2.L + R1.L(NS);
42 R2.H = R2.L + R1.H(NS);
66 B[P0++] = R1;
78 B[P0++] = R1;
83 B[P0++] = R1;
84 B[P0++] = R1;
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| D | strcpy.S | 26 P1 = R1 ; /* src*/
29 R1 = B [P1++] (Z); define
30 B [P0++] = R1;
31 CC = R1;
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| D | modsi3.S | 27 CC=R1==0;
29 CC=R0==R1;
31 CC = R1 == 1;
33 CC = R1 == -1;
42 R6 = R1; /* Save for later */
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| D | muldi3.S | 51 A0 = R2.H * R1.L, A1 = R2.L * R1.H (FU) || R3 = [SP + 12]; /* E1 */
56 A0 += R2.l * R1.l (FU); /* E2 */
66 R1 = A0.w; define
71 R1.h = R1.h + R4.l (NS) || R4 = [SP];
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| D | umodsi3.S | 23 CC= R1==0;
25 CC=R0==R1;
27 CC = R1 == 1;
29 CC = R0<R1 (IU);
35 R6 = R1;
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| D | strcmp.S | 28 P1 = R1 ; /* s2 */
32 R1 = B[P1++] (Z); /* get *s2 */ define
33 CC = R0 == R1; /* compare a byte */
39 R0 = R0 - R1; /* *s1 - *s2 */
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| D | strncpy.S | 32 P1 = R1 ; /* src*/
36 R1 = B [P1++] (Z); define
37 B [P0++] = R1;
38 CC = R1 == 0;
81 B [P0++] = R1;
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| D | outs.S | 19 P1 = R1; /* P1 = address */
32 P1 = R1; /* P1 = address */
45 P1 = R1; /* P1 = address */
58 P1 = R1; /* P1 = address */
62 .Lword8_loop_s: R1 = B[P1++];
65 R0 = R0 + R1;
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| D | strncmp.S | 29 P1 = R1 ; /* s2 */
32 R1 = B[P1++] (Z); /* get *s2 */ define
33 CC = R0 == R1; /* compare a byte */
44 R0 = R0 - R1; /* *s1 - *s2 */
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| D | memchr.S | 24 R1 = R1.B(Z); define
33 CC = R3 == R1;
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| /arch/x86/crypto/ |
| D | twofish-x86_64-asm_64.S | 47 #define R1 %rbx macro
219 pushq R1
228 movq (R3), R1
230 input_whitening(R1,%r11,a_offset)
234 shr $32, R1
239 encrypt_round(R0,R1,R2,R3,0);
240 encrypt_round(R2,R3,R0,R1,8);
241 encrypt_round(R0,R1,R2,R3,2*8);
242 encrypt_round(R2,R3,R0,R1,3*8);
243 encrypt_round(R0,R1,R2,R3,4*8);
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| D | twofish-i586-asm_32.S | 244 encrypt_round(R0,R1,R2,R3,0);
245 encrypt_round(R2,R3,R0,R1,8);
246 encrypt_round(R0,R1,R2,R3,2*8);
247 encrypt_round(R2,R3,R0,R1,3*8);
248 encrypt_round(R0,R1,R2,R3,4*8);
249 encrypt_round(R2,R3,R0,R1,5*8);
250 encrypt_round(R0,R1,R2,R3,6*8);
251 encrypt_round(R2,R3,R0,R1,7*8);
252 encrypt_round(R0,R1,R2,R3,8*8);
253 encrypt_round(R2,R3,R0,R1,9*8);
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| /arch/blackfin/kernel/ |
| D | fixed_code.S | 41 [P0] = R1;
57 CC = R0 == R1;
73 R1 = [P0]; define
74 R0 = R1 + R0;
88 R1 = [P0]; define
89 R0 = R1 - R0;
103 R1 = [P0]; define
104 R0 = R1 | R0;
118 R1 = [P0]; define
119 R0 = R1 & R0;
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| /arch/blackfin/mach-common/ |
| D | dpmc_modes.S | 21 R1 = W[P0](z); define
22 BITSET (R1, 3);
23 W[P0] = R1.L;
33 R1 = IWR_DISABLE_ALL; define
72 R1 = IWR_DISABLE_ALL; define
96 P4 = R1;
100 R1 = IWR_DISABLE_ALL; define
126 R1 = 0x6; define
127 R1 <<= 16;
129 R1 = R1|R2; define
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| D | cache.S | 37 R1 += -1;
38 R1 = R1 & R2; define
39 R1 += L1_CACHE_BYTES;
42 R2 = R1 - R0;
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| D | interrupt.S | 169 R1 = [P0]; define
170 CC = BITTST(R1, EVT_IVHW_P);
173 R1 = EVT_IVHW_P; define
174 [P0] = R1;
176 CC = R1 == R2;
188 R1.L = LO(VEC_HWERR);
189 R1.H = HI(VEC_HWERR);
190 R0 = R0 | R1;
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| /arch/blackfin/include/asm/ |
| D | entry.h | 32 R1 = [P0];
113 R1 = ASTAT; \
123 ASTAT = R1; \
130 1: ASTAT = R1; \
143 R1 = ASTAT; \
153 ASTAT = R1; \
159 1: ASTAT = R1; \
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| /arch/hexagon/kernel/ |
| D | vm_entry.S | 220 memd(R29 + #(_PT_R0100 + -_PT_REGS_SIZE)) = R1:0; \
227 memd(R29 + #_PT_ER_VMEL) = R1:0; \
229 R1.L = #LO(CHandler); \
233 R1.H = #HI(CHandler); \
243 memd(R29 + #(_PT_R0100 + -_PT_REGS_SIZE)) = R1:0; \
252 R1:0 = G1:0; \
254 memd(R29 + #_PT_ER_VMEL) = R1:0; \
255 R1 = # ## #(CHandler); \
315 R1 = memw(THREADINFO_REG + #_THREAD_INFO_FLAGS); define
334 R1:0 = memd(R29 + #_PT_ER_VMEL);
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