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Searched refs:SOCFPGA_A10_RSTMGR_CTRL (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-socfpga/
Dsocfpga.c96 temp = readl(rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); in socfpga_arria10_restart()
102 writel(temp, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); in socfpga_arria10_restart()
Dcore.h28 #define SOCFPGA_A10_RSTMGR_CTRL 0xC macro