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Searched refs:TBIXCACHE_WD (Results 1 – 1 of 1) sorted by relevance

/arch/metag/include/asm/
Dtbx.h1274 #define TBIXCACHE_WD(ADDR, DATA) do {\ macro
1289 TBIXCACHE_WD(ADDR, CACHEW_FLUSH_L1D_L2)
1291 TBIXCACHE_WD(ADDR, CACHEW_WRITEBACK_L1D_L2)
1293 TBIXCACHE_WD(ADDR, CACHEW_INVALIDATE_L1D)
1295 TBIXCACHE_WD(ADDR, CACHEW_INVALIDATE_L1D_L2)
1297 TBIXCACHE_WD(ADDR, CACHEW_INVALIDATE_L1DTLB)
1299 TBIXCACHE_WD(ADDR, CACHEW_INVALIDATE_L1I)
1301 TBIXCACHE_WD(ADDR, CACHEW_INVALIDATE_L1ITLB)
1347 #define TBIICACHE_FLUSH( pAddr ) TBIXCACHE_WD (pAddr, CACHEW_ICACHE_BIT)
1351 TBIXCACHE_WD(pAddr, CACHEW_TLBFLUSH_BIT + ( \