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Searched refs:TSR_WIS (Results 1 – 5 of 5) sorted by relevance

/arch/powerpc/kvm/
Dbooke.c581 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) in arm_next_watchdog()
609 if (tsr & TSR_WIS) in kvmppc_watchdog_func()
612 new_tsr = tsr | TSR_WIS; in kvmppc_watchdog_func()
618 if (new_tsr & TSR_WIS) { in kvmppc_watchdog_func()
652 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) in update_timer_ints()
1370 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) in kvmppc_set_tsr()
1845 if (tsr_bits & (TSR_ENW | TSR_WIS)) in kvmppc_clr_tsr_bits()
/arch/powerpc/kernel/
Dswsusp_booke.S184 lis r4, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h
Dswsusp_asm64.S248 lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h
Dtime.c725 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); in start_cpu_decrementer()
/arch/powerpc/include/asm/
Dreg_booke.h576 #define TSR_WIS 0x40000000 /* WDT Interrupt Status */ macro