/arch/mn10300/proc-mn2ws0050/include/proc/ |
D | intctl-regs.h | 14 #define __GET_XIRQ_TRIGGER(X, Z) (((Z) >> ((X) * 2)) & 3) argument 16 #define __SET_XIRQ_TRIGGER(X, Y, Z) \ argument 18 typeof(Z) x = (Z); \ 21 (Z) = x; \
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/arch/mn10300/proc-mn103e010/include/proc/ |
D | intctl-regs.h | 14 #define __GET_XIRQ_TRIGGER(X, Z) (((Z) >> ((X) * 2)) & 3) argument 16 #define __SET_XIRQ_TRIGGER(X, Y, Z) \ argument 18 typeof(Z) x = (Z); \ 21 (Z) = x; \
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/arch/m68k/fpsp040/ |
D | satan.S | 350 |--WHICH IS X + X*Y*( [B1+Z*(B3+Z*B5)] + [Y*(B2+Z*(B4+Z*B6)] ) 351 |--WHERE Y = X*X, AND Z = Y*Y. 362 fmulx %fp1,%fp1 | ...FP1 IS Z = Y*Y 367 fmulx %fp1,%fp2 | ...Z*B6 368 fmulx %fp1,%fp3 | ...Z*B5 370 faddd ATANB4,%fp2 | ...B4+Z*B6 371 faddd ATANB3,%fp3 | ...B3+Z*B5 373 fmulx %fp1,%fp2 | ...Z*(B4+Z*B6) 374 fmulx %fp3,%fp1 | ...Z*(B3+Z*B5) 376 faddd ATANB2,%fp2 | ...B2+Z*(B4+Z*B6) [all …]
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D | ssinh.S | 86 |--Y = |X|, Z = EXPM1(Y), SINH(X) = SIGN(X)*(1/2)*( Z + Z/(1+Z) ) 93 bsr setoxm1 | ...FP0 IS Z = EXPM1(Y) 98 fadds #0x3F800000,%fp1 | ...1+Z 100 fdivx %fp1,%fp0 | ...Z/(1+Z)
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D | stanh.S | 95 |--Y = 2|X|, Z = EXPM1(Y), TANH(X) = SIGN(X) * Z / (Z+2). 108 bsr setoxm1 | ...FP0 IS Z = EXPM1(Y) 112 fadds #0x40000000,%fp1 | ...Z+2
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D | satanh.S | 76 |--Y = |X|, Z = 2Y/(1-Y), ATANH(X) = SIGN(X) * (1/2) * LOG1P(Z). 92 bsr slognp1 | ...LOG1P(Z)
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D | kernel_ex.S | 68 fmovel #0,%FPSR |clr status bits (Z set) 73 fmovel #0,%FPSR |clr status bits (Z set)
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/arch/blackfin/lib/ |
D | strcmp.S | 31 R0 = B[P0++] (Z); /* get *s1 */ 32 R1 = B[P1++] (Z); /* get *s2 */
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D | memchr.S | 24 R1 = R1.B(Z); 32 R3 = B[P0++](Z);
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D | strncmp.S | 31 R0 = B[P0++] (Z); /* get *s1 */ 32 R1 = B[P1++] (Z); /* get *s2 */
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D | memmove.S | 69 .Lbyte2_s: R1 = B[P3++](Z); 79 R1 = B[P3--] (Z); 88 .Lol_e: R1 = B[P3--] (Z);
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D | udivsi3.S | 63 R0 = R0.L (Z); 112 R2 = R2.L (Z); 218 R1 = R1.L (Z); 261 R3 = R2.L (Z); /* Q = X' / Y' */ 269 R3 = 0xFFFF (Z);
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D | divsi3.S | 75 R0 = R0.L (Z); 101 R2 = R2.L (Z); 154 R2 = 1 (Z); 185 R1 = R1.L (Z);
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D | memcmp.S | 60 R1 = B[P3++](Z); /* *s2 */ 61 R0 = B[P0++](Z); /* *s1 */
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D | strcpy.S | 29 R1 = B [P1++] (Z);
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D | strncpy.S | 36 R1 = B [P1++] (Z);
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D | memset.S | 32 R1 = R1.B (Z); /* R1 = fill char */
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/arch/arc/include/asm/ |
D | entry-arcv2.h | 14 ; 2. STATUS32.Z flag set to U mode at time of interrupt (U:1, K:0) 27 ; Utilize the fact that Z bit is set if Intr taken in U mode 119 ; Set Z flag if this was from U mode (expected by INTERRUPT_PROLOGUE) 120 ; Although H/w exception micro-ops do set Z flag for U mode (just like 139 btst r0, STATUS_U_BIT ; Z flag set if K, used in INTERRUPT_EPILOGUE
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/arch/blackfin/kernel/ |
D | trace.c | 464 int Z = ((opcode >> LDST_Z_bits) & LDST_Z_mask); in decode_LDST_0() local 472 pr_cont("%s%i = ", (sz == 0 && Z == 1) ? "P" : "R", reg); in decode_LDST_0() 496 pr_cont(" = %s%i ", (sz == 0 && Z == 1) ? "P" : "R", reg); in decode_LDST_0() 499 if (Z) in decode_LDST_0() 559 int Z = ((opcode >> LDSTidxI_Z_bits) & LDSTidxI_Z_mask); in decode_LDSTidxI_0() local 567 pr_cont("%s%i = ", sz == 0 && Z == 1 ? "P" : "R", reg); in decode_LDSTidxI_0() 578 if (Z) in decode_LDSTidxI_0() 585 pr_cont("= %s%i", (sz == 0 && Z == 1) ? "P" : "R", reg); in decode_LDSTidxI_0()
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/arch/mn10300/lib/ |
D | __ucmpdi2.S | 31 subc a1,d1 # may clear Z, never sets it
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/arch/blackfin/include/asm/ |
D | uaccess.h | 139 __get_user_asm(_val, _p, B, (Z)); \ 142 __get_user_asm(_val, _p, W, (Z)); \
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/arch/arm/boot/dts/ |
D | lpc3250-ea3250.dts | 148 /* 3-axis accelerometer X,Y,Z (or AD-IN instead of Z) */
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/arch/blackfin/mach-common/ |
D | dpmc_modes.S | 128 R2 = 0x0404(Z); 280 R0 = W[P0] (Z);
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/arch/arc/kernel/ |
D | entry-arcv2.S | 200 btst r0, STATUS_U_BIT ; Z flag set if K (Z clear for U)
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/arch/m68k/include/asm/ |
D | sun3xflop.h | 31 #define request_region(X, Y, Z) (1) argument
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