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Searched refs:_PAGE_COHERENT (Results 1 – 14 of 14) sorted by relevance

/arch/powerpc/include/asm/
Dpte-common.h22 #ifndef _PAGE_COHERENT
23 #define _PAGE_COHERENT 0 macro
115 #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
129 #define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
/arch/powerpc/include/asm/nohash/32/
Dpte-44x.h83 #define _PAGE_COHERENT 0x00000200 /* H: M bit */ macro
Dpte-fsl-booke.h28 #define _PAGE_COHERENT 0x00100 /* H: M bit */ macro
/arch/powerpc/include/asm/book3s/32/
Dhash.h23 #define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */ macro
Dpgtable.h438 #define _PAGE_CACHE_CTL (_PAGE_COHERENT | _PAGE_GUARDED | _PAGE_NO_CACHE | \
459 _PAGE_COHERENT); in pgprot_cached()
466 _PAGE_COHERENT | _PAGE_WRITETHRU); in pgprot_cached_wthru()
/arch/powerpc/include/asm/nohash/
Dpgtable.h201 #define _PAGE_CACHE_CTL (_PAGE_COHERENT | _PAGE_GUARDED | _PAGE_NO_CACHE | \
211 _PAGE_COHERENT))
214 _PAGE_COHERENT | _PAGE_WRITETHRU))
Dpte-book3e.h45 #define _PAGE_COHERENT 0x200000 /* M: enforce memory coherence */ macro
/arch/powerpc/mm/
Dppc_mmu_32.c125 flags &= ~_PAGE_COHERENT; in setbat()
132 | _PAGE_COHERENT | _PAGE_GUARDED); in setbat()
150 | _PAGE_COHERENT); in setbat()
Dfsl_booke_mmu.c119 flags |= _PAGE_COHERENT; in settlbcam()
128 TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0; in settlbcam()
Dpgtable_32.c170 flags &= ~_PAGE_COHERENT; in __ioremap_caller()
Dhash_low_32.S328 rlwinm r8,r8,0,~_PAGE_COHERENT /* clear M (coherence not required) */
/arch/powerpc/sysdev/
Dfsl_85xx_cache_sram.c111 cache_sram->size, _PAGE_COHERENT | PAGE_KERNEL); in instantiate_cache_sram()
/arch/powerpc/platforms/85xx/
Dsmp.c219 sizeof(struct epapr_spin_table), _PAGE_COHERENT); in smp_85xx_start_cpu()
/arch/powerpc/kernel/
Dhead_32.S532 rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
606 rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
686 rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */