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/arch/mips/kvm/
Dmsa.S20 st_d 0, VCPU_FPR0, a0
21 st_d 1, VCPU_FPR1, a0
22 st_d 2, VCPU_FPR2, a0
23 st_d 3, VCPU_FPR3, a0
24 st_d 4, VCPU_FPR4, a0
25 st_d 5, VCPU_FPR5, a0
26 st_d 6, VCPU_FPR6, a0
27 st_d 7, VCPU_FPR7, a0
28 st_d 8, VCPU_FPR8, a0
29 st_d 9, VCPU_FPR9, a0
[all …]
Dfpu.S31 sdc1 $f1, VCPU_FPR1(a0)
32 sdc1 $f3, VCPU_FPR3(a0)
33 sdc1 $f5, VCPU_FPR5(a0)
34 sdc1 $f7, VCPU_FPR7(a0)
35 sdc1 $f9, VCPU_FPR9(a0)
36 sdc1 $f11, VCPU_FPR11(a0)
37 sdc1 $f13, VCPU_FPR13(a0)
38 sdc1 $f15, VCPU_FPR15(a0)
39 sdc1 $f17, VCPU_FPR17(a0)
40 sdc1 $f19, VCPU_FPR19(a0)
[all …]
/arch/mips/kernel/
Dr4k_fpu.S66 EX sdc1 $f1, 8(a0)
67 EX sdc1 $f3, 24(a0)
68 EX sdc1 $f5, 40(a0)
69 EX sdc1 $f7, 56(a0)
70 EX sdc1 $f9, 72(a0)
71 EX sdc1 $f11, 88(a0)
72 EX sdc1 $f13, 104(a0)
73 EX sdc1 $f15, 120(a0)
74 EX sdc1 $f17, 136(a0)
75 EX sdc1 $f19, 152(a0)
[all …]
Dr6000_fpu.S40 sdc1 $f0,0(a0)
41 sdc1 $f2,16(a0)
42 sdc1 $f4,32(a0)
43 sdc1 $f6,48(a0)
44 sdc1 $f8,64(a0)
45 sdc1 $f10,80(a0)
46 sdc1 $f12,96(a0)
47 sdc1 $f14,112(a0)
48 sdc1 $f16,128(a0)
49 sdc1 $f18,144(a0)
[all …]
Docteon_switch.S27 LONG_S t1, THREAD_STATUS(a0)
28 cpu_save_nonscratch a0
29 LONG_S ra, THREAD_REG31(a0)
42 LONG_ADDI t2, a0, THREAD_CVMSEG /* Where to store CVMSEG to */
87 move v0, a0
105 sd t0, OCTEON_CP2_CRC_IV(a0)
106 sd t1, OCTEON_CP2_CRC_LENGTH(a0)
109 sd t2, OCTEON_CP2_CRC_POLY(a0)
114 sd t0, OCTEON_CP2_LLM_DAT(a0)
117 sd t1, OCTEON_CP2_LLM_DAT+8(a0)
[all …]
Dcps-vec-ns16550.S30 sb a0, UART_TX_OFS(t9)
43 move s6, a0
45 1: lb a0, 0(s6)
46 beqz a0, 2f
62 andi a0, a0, 0xf
64 blt a0, 10, 1f
66 addiu a0, a0, -10
67 1: addu a0, a0, t0
80 move s2, a0
81 srl a0, a0, 4
[all …]
Dr2300_fpu.S50 EX2(s.d $f0, 0(a0))
51 EX2(s.d $f2, 16(a0))
52 EX2(s.d $f4, 32(a0))
53 EX2(s.d $f6, 48(a0))
54 EX2(s.d $f8, 64(a0))
55 EX2(s.d $f10, 80(a0))
56 EX2(s.d $f12, 96(a0))
57 EX2(s.d $f14, 112(a0))
58 EX2(s.d $f16, 128(a0))
59 EX2(s.d $f18, 144(a0))
[all …]
Dbmips_5xxx_init.S122 mfc0 a0, CP0_CONFIG, 1
123 move t0, a0
134 srl a0, a0, IS_SHIFT
135 and a0, a0, IS_MASK
140 sllv v0, v0, a0
150 move a0, t0
152 srl a0, a0, IL_SHIFT
153 and a0, a0, IL_MASK
155 beqz a0, no_i_cache
160 addi a0, a0, 1
[all …]
/arch/xtensa/kernel/
Dvectors.S76 s32i a0, a2, PT_AREG0 # save a0 to ESF
77 rsr a0, exccause # retrieve exception cause
78 s32i a0, a2, PT_DEPC # mark it as a regular exception
79 addx4 a0, a0, a3 # find entry in table
80 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
82 jx a0
103 s32i a0, a2, PT_AREG0 # save a0 to ESF
104 rsr a0, exccause # retrieve exception cause
105 s32i a0, a2, PT_DEPC # mark it as a regular exception
106 addx4 a0, a0, a3 # find entry in table
[all …]
Dcoprocessor.S47 wsr a0, excsave1
48 movi a0, unrecoverable_exception
49 callx0 a0
65 jx a0
82 jx a0
147 s32i a0, a1, 0
148 movi a0, .Lsave_cp_regs_jump_table
149 addx8 a3, a3, a0
152 add a0, a0, a3
153 callx0 a0
[all …]
Dentry.S133 rsr a0, depc
135 s32i a0, a2, PT_AREG2
206 ffs_ws a0, a3 # number of frames to the '1' from left
213 slli a3, a0, 4 # number of frames to save in bits 8..4
221 s32i a0, a5, PT_AREG_END - 16
225 addi a0, a4, -1
227 _bnez a0, 1b
279 rsr a0, depc # get a2
281 s32i a0, a2, PT_AREG2
609 2: rotw -1 # a0..a3 become a4..a7
[all …]
/arch/mn10300/lib/
Dmemmove.S34 add d0,d2,a0 # dst end
57 sub_sub +4,a1,+4,a0
58 mov d0,(a0)
60 sub_sub +4,a1,+4,a0
61 mov d1,(a0)
64 sub_sub +4,a1,+4,a0
65 mov d0,(a0)
67 sub_sub +4,a1,+4,a0
68 mov d1,(a0)
71 sub_sub +4,a1,+4,a0
[all …]
Ddo_csum.S26 mov d0,a0 # buff
27 mov a0,a1
34 btst +3,a0
37 btst +1,a0
39 movbu (a0),d0
40 inc a0
48 btst +2,a0
50 movhu (a0+),d0
65 mov (a0+),d0
66 mov (a0+),e0
[all …]
Dmemset.S28 mov d0,a0 # dst
53 mov d1,(a0+)
54 mov d1,(a0+)
55 mov d1,(a0+)
56 mov d1,(a0+)
57 mov d1,(a0+)
58 mov d1,(a0+)
59 mov d1,(a0+)
60 mov d1,(a0+)
72 mov d1,(a0+)
[all …]
Dmemcpy.S28 mov d0,a0 # dst
58 mov d0,(a0+)
59 mov d1,(a0+)
60 mov e0,(a0+)
61 mov e1,(a0+)
62 mov e4,(a0+)
63 mov e5,(a0+)
64 mov e6,(a0+)
65 mov e7,(a0+)
82 mov d0,(a0+)
[all …]
/arch/m68k/kernel/
Dhead.S603 movel %a0@,%a1@
607 movel %a0@,%a1@
611 movel %a0@,%a1@
615 movel %a0@,%a1@
629 movel %a0@,%a1@
633 movel %a0@,%a1@
637 movel %a0@,%a1@
641 movel %a0@,%a1@
645 movel %a0@,%a1@
692 lea %pc@(L(cputype)),%a0
[all …]
/arch/m68k/coldfire/
Dentry.S69 lea sys_call_table,%a0
71 movel %a0@(%d0),%d3
77 movel %d2,%a0
78 movel %a0@,%a1 /* save top of frame */
80 btst #(TIF_SYSCALL_TRACE%8),%a0@(TINFO_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
83 movel %d3,%a0
84 jbsr %a0@
95 movel %d3,%a0
96 jbsr %a0@
114 movel %d1,%a0
[all …]
/arch/m68k/math-emu/
Dfp_entry.S87 move.l %a0,-(%sp)
228 move.l (PT_OFF_A0+8,%sp),%a0
229 printf PREGISTER,"{a0->%08x}",1,%a0
233 move.l (PT_OFF_A1+8,%sp),%a0
234 printf PREGISTER,"{a1->%08x}",1,%a0
238 move.l (PT_OFF_A2+8,%sp),%a0
239 printf PREGISTER,"{a2->%08x}",1,%a0
243 move.l %a3,%a0
244 printf PREGISTER,"{a3->%08x}",1,%a0
248 move.l %a4,%a0
[all …]
Dfp_util.S95 | %a0 = destination (ptr to struct fp_ext)
98 printf PCONV,"l2e: %p -> %p(",2,%d0,%a0
107 move.l %d1,(%a0)+ | set sign / exp
108 move.l %d0,(%a0)+ | set mantissa
109 clr.l (%a0)
110 subq.l #8,%a0 | restore %a0
111 printx PCONV,%a0@
116 clr.l (%a0)+
117 clr.l (%a0)+
118 clr.l (%a0)
[all …]
Dfp_movem.S143 1: printf PMOVEM,"(%p>%p)",2,%a0,%a1
144 getuser.l (%a0)+,%d2,fp_err_ua1,%a0
149 getuser.l (%a0)+,%d2,fp_err_ua1,%a0
151 getuser.l (%a0),%d2,fp_err_ua1,%a0
153 subq.l #8,%a0
155 add.l %d0,%a0
162 1: printf PMOVEM,"(%p>%p)",2,%a1,%a0
167 putuser.l %d2,(%a0)+,fp_err_ua1,%a0
169 putuser.l %d2,(%a0)+,fp_err_ua1,%a0
171 putuser.l %d2,(%a0),fp_err_ua1,%a0
[all …]
/arch/xtensa/boot/boot-elf/
Dbootstrap.S56 movi a0, 0
57 wsr a0, windowbase
59 movi a0, 1
60 wsr a0, windowstart
62 movi a0, 0x1F
63 wsr a0, ps
72 rsil a0, XCHAL_DEBUGLEVEL-1
75 l32r a0, RomInitAddr
79 jx a0
/arch/mn10300/kernel/
Dhead.S53 mov 0x1,a0
55 mov a0,a1
62 inc a0
63 cmp NR_CPUS,a0
95 mov ECHCTR,a0
97 mov d0,(a0)
99 mov CHCTR,a0
101 movhu d0,(a0) # turn off first
103 movhu d0,(a0)
105 mov (a0),d0
[all …]
/arch/mips/alchemy/common/
Dsleeper.S105 1: lui a0, 0xb400 /* mem_xxx */
106 sw zero, 0x001c(a0) /* Precharge */
108 sw zero, 0x0020(a0) /* Auto Refresh */
110 sw zero, 0x0030(a0) /* Sleep */
131 1: lui a0, 0xb400 /* mem_xxx */
132 sw zero, 0x08c0(a0) /* Precharge */
134 sw zero, 0x08d0(a0) /* Self Refresh */
139 2: lw t1, 0x0850(a0) /* mem_sdstat */
147 lw t1, 0x0840(a0) /* mem_sdconfiga */
149 sw t1, 0x0840(a0) /* mem_sdconfiga */
[all …]
/arch/mips/include/asm/
Dkvm_para.h34 register unsigned long a0 asm("a0"); in kvm_hypercall1()
37 a0 = arg0; in kvm_hypercall1()
40 : "=r" (r) : "r" (n), "r" (a0) : "memory" in kvm_hypercall1()
51 register unsigned long a0 asm("a0"); in kvm_hypercall2()
55 a0 = arg0; in kvm_hypercall2()
59 : "=r" (r) : "r" (n), "r" (a0), "r" (a1) : "memory" in kvm_hypercall2()
70 register unsigned long a0 asm("a0"); in kvm_hypercall3()
75 a0 = arg0; in kvm_hypercall3()
80 : "=r" (r) : "r" (n), "r" (a0), "r" (a1), "r" (a2) : "memory" in kvm_hypercall3()
/arch/mips/lib/
Dmemset.S97 andi t0, a0, STORMASK /* aligned? */
117 EX(LONG_S_L, a1, (a0), .Lfirst_fixup\@) /* make word/dword aligned */
119 EX(LONG_S_R, a1, (a0), .Lfirst_fixup\@) /* make word/dword aligned */
121 PTR_SUBU a0, t0 /* long align ptr */
126 EX(sb, a1, N(a0), .Lbyte_fixup\@); \
135 EX(sb, a1, 2(a0), .Lbyte_fixup\@)
141 EX(sb, a1, 6(a0), .Lbyte_fixup\@)
144 ori a0, STORMASK
145 xori a0, STORMASK
146 PTR_ADDIU a0, STORSIZE
[all …]

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