| /arch/xtensa/mm/ |
| D | misc.S | 36 __loopi a2, a7, PAGE_SIZE, 32
37 s32i a3, a2, 0
38 s32i a3, a2, 4
39 s32i a3, a2, 8
40 s32i a3, a2, 12
41 s32i a3, a2, 16
42 s32i a3, a2, 20
43 s32i a3, a2, 24
44 s32i a3, a2, 28
45 __endla a2, a7, 32
[all …]
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| /arch/xtensa/lib/ |
| D | checksum.S | 50 extui a5, a2, 0, 2
60 add a5, a5, a2 /* a5 = end of last 32-byte chunk */
63 l32i a6, a2, 0
64 l32i a7, a2, 4
67 l32i a6, a2, 8
68 l32i a7, a2, 12
71 l32i a6, a2, 16
72 l32i a7, a2, 20
75 l32i a6, a2, 24
76 l32i a7, a2, 28
[all …]
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| D | strnlen_user.S | 41 # a2/ src
57 # a2/ s, a3/ len
58 addi a4, a2, -4 # because we overincrement at the end;
64 bbsi.l a2, 0, .L1mod2 # if only 8-bit aligned
65 bbsi.l a2, 1, .L2mod4 # if only 16-bit aligned
106 sub a2, a4, a2 # compute length
116 sub a2, a4, a2 # subtract to get length
120 sub a2, a4, a2 # subtract to get length
124 sub a2, a4, a2 # subtract to get length
140 sub a2, a4, a2 # subtract to get length
[all …]
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| D | strncpy_user.S | 44 # a2/ return value
62 # a2/ dst, a3/ src, a4/ len
63 mov a11, a2 # leave dst in return value register
103 sub a2, a11, a2 # compute strlen
158 sub a2, a11, a2 # compute strlen
165 sub a2, a11, a2 # compute strlen
173 sub a2, a11, a2 # compute strlen
183 sub a2, a11, a2 # compute strlen
209 sub a2, a11, a2 # compute strlen
223 movi a2, -EFAULT
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| /arch/xtensa/kernel/ |
| D | head.S | 57 wsr a2, excsave1
90 rsr a2, excsave1
92 bgeu a2, a3, 1f
94 add a2, a2, a3
95 wsr a2, excsave1
116 movi a2, VECBASE_VADDR
117 wsr a2, vecbase
157 movi a2, XCHAL_INTTYPE_MASK_SOFTWARE | XCHAL_INTTYPE_MASK_EXTERN_EDGE
159 wsr a2, intclear
172 ___unlock_dcache_all a2 a3
[all …]
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| D | entry.S | 134 s32i a1, a2, PT_AREG1
135 s32i a0, a2, PT_AREG2
136 s32i a3, a2, PT_AREG3
137 mov a1, a2
144 movi a2, 0
145 wsr a2, depc # terminate user stack trace with 0
147 xsr a2, icountlevel
149 s32i a2, a1, PT_ICOUNTLEVEL
152 rur a2, threadptr
153 s32i a2, a1, PT_THREADPTR
[all …]
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| D | vectors.S | 74 wsr a2, depc # save a2
75 l32i a2, a3, EXC_TABLE_KSTK # load kernel stack to a2
76 s32i a0, a2, PT_AREG0 # save a0 to ESF
78 s32i a0, a2, PT_DEPC # mark it as a regular exception
101 wsr a2, depc # save a2
102 addi a2, a1, -16-PT_SIZE # adjust stack pointer
103 s32i a0, a2, PT_AREG0 # save a0 to ESF
105 s32i a0, a2, PT_DEPC # mark it as a regular exception
215 s32i a2, a3, EXC_TABLE_DOUBLE_SAVE
219 rsr a2, ps
[all …]
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| D | coprocessor.S | 63 xchal_cp##x##_store a2 a4 a5 a6 a7; \
80 xchal_cp##x##_load a2 a4 a5 a6 a7; \
197 add a2, a2, a4
213 add a2, a2, a4
248 s32i a3, a2, PT_AREG3
250 s32i a1, a2, PT_AREG1
251 s32i a3, a2, PT_SAR
252 mov a1, a2
253 rsr a2, depc
254 s32i a2, a1, PT_AREG2
[all …]
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| D | align.S | 168 s32i a4, a2, PT_AREG4
169 s32i a5, a2, PT_AREG5
170 s32i a6, a2, PT_AREG6
171 s32i a7, a2, PT_AREG7
172 s32i a8, a2, PT_AREG8
175 s32i a0, a2, PT_AREG2
176 s32i a3, a2, PT_AREG3
283 s32i a3, a2, PT_AREG0; _j .Lexit; .align 8
285 s32i a3, a2, PT_AREG2; _j .Lexit; .align 8
286 s32i a3, a2, PT_AREG3; _j .Lexit; .align 8
[all …]
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| /arch/mn10300/kernel/ |
| D | switch_to.S | 32 movm [d2,d3,a2,a3,exreg1],(sp)
42 mov sp,a2
43 mov a2,(THREAD_SP,a0)
54 mov (THREAD_SP,a1),a2
57 mov a2,sp
60 GET_THREAD_INFO a2
61 mov a2,(__current_ti)
62 mov (TI_task,a2),a2
63 mov a2,(__current)
65 mov a2,e2
[all …]
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| D | mn10300-serial-low.S | 44 movm [d2,d3,a2,a3,exreg0],(sp)
46 movhu (IAGR),a2 # see if which interrupt is
48 and IAGR_GN,a2
49 add a2,a2
50 add mn10300_serial_int_tbl,a2
52 mov (a2+),a3
54 mov (a2),a2
55 jmp (a2)
75 mov d3,a2
83 add d2,a2
[all …]
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| /arch/mips/lib/ |
| D | memset.S | 95 sltiu t0, a2, STORSIZE /* very small region? */
122 PTR_ADDU a2, t0 /* correct size */
130 PTR_ADDU a2, t0 /* correct size */
148 1: ori t1, a2, 0x3f /* # of full blocks */
151 andi t0, a2, 0x40-STORSIZE
184 andi a2, STORMASK /* At most one long to go */
186 beqz a2, 1f
188 PTR_ADDU a0, a2 /* What's left */
196 PTR_SUBU t0, $0, a2
212 move a2, zero
[all …]
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| /arch/mn10300/mm/ |
| D | tlb-mn10300.S | 31 movm [d2,d3,a2],(sp)
47 mov (PTBR),a2
51 mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
52 btst _PAGE_VALID,a2
65 bset _PAGE_ACCESSED,(0,a2)
67 bset +(_PAGE_ACCESSED >> 8),(1,a2)
75 movm (sp),[d2,d3,a2]
94 movm [d2,d3,a2],(sp)
110 mov (PTBR),a2
114 mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
[all …]
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| D | cache-flush-by-reg.S | 110 movm [d2,d3,a2],(sp)
150 and d1,d0,a2 # a2 = mask & start
154 mov a2,d0
165 add d2,a2 # a2 += alignsize
166 cmp a1,a2 # if (a2 < end) goto dcpgloop
172 ret [d2,d3,a2],12
243 movm [d2,d3,a2],(sp)
283 and d1,d0,a2 # a2 = mask & start
287 mov a2,d0
298 add d2,a2 # a2 += alignsize
[all …]
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| D | cache-dbg-inv-by-tag.S | 100 movhu (a2),d0
106 movhu d0,(a2)
107 movhu (a2),d0
113 ret [d3,a2],8
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| /arch/mips/kernel/ |
| D | linux32.c | 87 unsigned long, __dummy, unsigned long, a2, unsigned long, a3)
89 return sys_truncate(path, merge_64(a2, a3));
93 unsigned long, a2, unsigned long, a3)
95 return sys_ftruncate(fd, merge_64(a2, a3));
135 asmlinkage ssize_t sys32_readahead(int fd, u32 pad0, u64 a2, u64 a3, in sys32_readahead() argument
138 return sys_readahead(fd, merge_64(a2, a3), count); in sys32_readahead()
142 unsigned long a2, unsigned long a3, in sys32_sync_file_range() argument
147 merge_64(a2, a3), merge_64(a4, a5), in sys32_sync_file_range()
152 unsigned long a2, unsigned long a3, in sys32_fadvise64_64() argument
157 merge_64(a2, a3), merge_64(a4, a5), in sys32_fadvise64_64()
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| D | entry.S | 56 LONG_L a2, TI_FLAGS($28) # current->work
57 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
90 LONG_L a2, TI_FLAGS($28) # current->work
92 and t0, a2, t0
138 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
147 LONG_L a2, TI_FLAGS($28)
148 andi t0, a2, _TIF_WORK_MASK # is there any work to be done
151 andi t0, a2, _TIF_NEED_RESCHED
158 jal do_notify_resume # a2 already loaded
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| /arch/arm/include/asm/ |
| D | xor.h | 15 #define __XOR(a1, a2) a1 ^= a2 argument
19 : "=r" (dst), "=r" (a1), "=r" (a2) \
24 : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \
31 __XOR(a1, b1); __XOR(a2, b2);
37 __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
42 : "0" (dst), "r" (a1), "r" (a2))
47 : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4))
54 register unsigned int a2 __asm__("r5"); in xor_arm4regs_2()
75 register unsigned int a2 __asm__("r5"); in xor_arm4regs_3()
97 register unsigned int a2 __asm__("r9"); in xor_arm4regs_4()
[all …]
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| D | kvm_asm.h | 50 #define rr_lo_hi(a1, a2) a2, a1 argument
52 #define rr_lo_hi(a1, a2) a1, a2 argument
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| /arch/m68k/kernel/ |
| D | relocate_kernel.S | 96 movel %d0,%a2 /* a2 = dst = entry & PAGE_MASK */
107 movel %a3@+,%a2@+ /* *dst++ = *src++ */
108 movel %a3@+,%a2@+ /* *dst++ = *src++ */
109 movel %a3@+,%a2@+ /* *dst++ = *src++ */
110 movel %a3@+,%a2@+ /* *dst++ = *src++ */
111 movel %a3@+,%a2@+ /* *dst++ = *src++ */
112 movel %a3@+,%a2@+ /* *dst++ = *src++ */
113 movel %a3@+,%a2@+ /* *dst++ = *src++ */
114 movel %a3@+,%a2@+ /* *dst++ = *src++ */
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| /arch/x86/crypto/sha512-mb/ |
| D | sha512_x4_avx2.S | 95 a2 = %ymm10 define
116 # r0 = {a7 a6 a5 a4 a3 a2 a1 a0}
123 # r1 = {d3 d2 c3 c2 b3 b2 a3 a2}
129 vshufps $0xEE, \r1, \r0, \r0 # r0 = {b7 b6 a7 a6 b3 b2 a3 a2}
134 vperm2f128 $0x31, \r2, \r0, \r3 # h2...a2
182 vpxor g, f, a2 # ch: a2 = f^g
183 vpand e,a2, a2 # ch: a2 = (f^g)&e
184 vpxor g, a2, a2 # a2 = ch
193 vpaddq a2, h, h # h = h + ch
194 PRORQ_nd a2,a,6 # sig0: a2 = (a >> 11)
[all …]
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| /arch/alpha/lib/ |
| D | stxncpy.S | 61 beq a2, $a_eoc # .. e1 :
72 subq a2, 1, a2 # e0 :
74 beq a2, $a_eoc # e1 :
124 addq a2, t0, a2 # .. e1 : bias count by dest misalignment
125 subq a2, 1, a2 # e0 :
126 and a2, 7, t2 # e1 :
127 srl a2, 3, a2 # e0 : a2 = loop counter = (count - 1)/8
166 beq a2, $u_eocfin # .. e1 :
176 subq a2, 1, a2 # e0 :
183 beq a2, $u_eoc # .. e1 :
[all …]
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| /arch/m68k/include/asm/ |
| D | entry.h | 75 moveml %d1-%d5/%a0-%a2,%sp@
85 moveml %d1-%d5/%a0-%a2,%sp@
100 moveml %sp@,%d1-%d5/%a0-%a2
131 moveml %d1-%d5/%a0-%a2,%sp@
140 moveml %d1-%d5/%a0-%a2,%sp@
144 moveml %sp@,%d1-%d5/%a0-%a2
189 moveml %d1-%d5/%a0-%a2,%sp@-
196 moveml %d1-%d5/%a0-%a2,%sp@-
200 moveml %sp@+,%a0-%a2/%d1-%d5
225 #define curptr a2
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| /arch/mips/boot/compressed/ |
| D | head.S | 25 move s2, a2
30 PTR_LA a2, _end
32 bne a2, a0, 1b
45 move a2, s2
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| /arch/mips/include/asm/ |
| D | sgiarcs.h | 404 #define ARC_CALL2(dest, a1, a2) \ argument
407 register signed int __a2 __asm__("$5") = (int) (long) (a2); \
420 #define ARC_CALL3(dest, a1, a2, a3) \ argument
423 register signed int __a2 __asm__("$5") = (int) (long) (a2); \
437 #define ARC_CALL4(dest, a1, a2, a3, a4) \ argument
440 register signed int __a2 __asm__("$5") = (int) (long) (a2); \
456 #define ARC_CALL5(dest, a1, a2, a3, a4, a5) \ argument
459 register signed int __a2 __asm__("$5") = (int) (long) (a2); \
500 #define ARC_CALL2(dest, a1, a2) \ argument
503 long __a2 = (long) (a2); \
[all …]
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