Searched refs:bit_width (Results 1 – 8 of 8) sorted by relevance
| /arch/ia64/hp/common/ |
| D | aml_nfw.c | 79 static void aml_nfw_read_arg(u8 *offset, u32 bit_width, u64 *value) in aml_nfw_read_arg() argument
81 switch (bit_width) { in aml_nfw_read_arg()
97 static void aml_nfw_write_arg(u8 *offset, u32 bit_width, u64 *value) in aml_nfw_write_arg() argument
99 switch (bit_width) { in aml_nfw_write_arg()
116 u32 bit_width, u64 *value, void *handler_context, in aml_nfw_handler() argument
122 if (bit_width != 8 && bit_width != 16 && in aml_nfw_handler()
123 bit_width != 32 && bit_width != 64) in aml_nfw_handler()
126 if (address + (bit_width >> 3) > sizeof(struct ia64_nfw_context)) in aml_nfw_handler()
133 aml_nfw_read_arg(offset, bit_width, value); in aml_nfw_handler()
136 aml_nfw_write_arg(offset, bit_width, value); in aml_nfw_handler()
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| /arch/x86/kernel/acpi/ |
| D | cppc_msr.c | 32 u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, in cpc_read_ffh()
48 u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, in cpc_write_ffh()
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| /arch/x86/oprofile/ |
| D | op_model_ppro.c | 90 if (counter_width < eax.split.bit_width) in ppro_setup_ctrs()
91 counter_width = eax.split.bit_width; in ppro_setup_ctrs()
219 eax.split.bit_width = 40; in arch_perfmon_setup_counters()
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| /arch/x86/include/asm/ |
| D | perf_event.h | 89 unsigned int bit_width:8; member
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| /arch/x86/kernel/ |
| D | tboot.c | 262 tbg.bit_width = g.bit_width; \ in tboot_copy_fadt()
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| /arch/x86/kvm/ |
| D | pmu_intel.c | 283 pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1; in intel_pmu_refresh()
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| D | cpuid.c | 497 eax.split.bit_width = cap.bit_width_gp; in __do_cpuid_ent()
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| /arch/x86/events/intel/ |
| D | core.c | 3603 x86_pmu.cntval_bits = eax.split.bit_width; in intel_pmu_init()
3604 x86_pmu.cntval_mask = (1ULL << eax.split.bit_width) - 1; in intel_pmu_init()
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