| /arch/alpha/include/asm/ |
| D | word-at-a-time.h | 21 static inline unsigned long has_zero(unsigned long val, unsigned long *bits, const struct word_at_a… in has_zero() argument
24 *bits = zero_locations; in has_zero()
28 static inline unsigned long prep_zero_mask(unsigned long val, unsigned long bits, const struct word… in prep_zero_mask() argument
30 return bits; in prep_zero_mask()
33 #define create_zero_mask(bits) (bits) argument
35 static inline unsigned long find_zero(unsigned long bits) in find_zero() argument
39 return __kernel_cttz(bits); in find_zero()
43 bits &= -bits; in find_zero()
45 t1 = bits & 0xf0; in find_zero()
46 t2 = bits & 0xcc; in find_zero()
[all …]
|
| /arch/powerpc/include/asm/ |
| D | word-at-a-time.h | 59 static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_t… in has_zero() argument
65 *bits = ret; in has_zero()
70 static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_a… in prep_zero_mask() argument
72 return bits; in prep_zero_mask()
76 static inline unsigned long create_zero_mask(unsigned long bits) in create_zero_mask() argument
85 : "b" (bits)); in create_zero_mask()
126 static inline unsigned long create_zero_mask(unsigned long bits) in create_zero_mask() argument
128 bits = (bits - 1) & ~bits; in create_zero_mask()
129 return bits >> 7; in create_zero_mask()
138 static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_t… in has_zero() argument
[all …]
|
| /arch/sh/include/asm/ |
| D | word-at-a-time.h | 26 static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_t… in has_zero() argument
29 *bits = mask; in has_zero()
33 static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_a… in prep_zero_mask() argument
35 return bits; in prep_zero_mask()
38 static inline unsigned long create_zero_mask(unsigned long bits) in create_zero_mask() argument
40 bits = (bits - 1) & ~bits; in create_zero_mask()
41 return bits >> 7; in create_zero_mask()
|
| /arch/arm64/include/asm/ |
| D | word-at-a-time.h | 31 static inline unsigned long has_zero(unsigned long a, unsigned long *bits, in has_zero() argument
35 *bits = mask; in has_zero()
39 #define prep_zero_mask(a, bits, c) (bits) argument
41 static inline unsigned long create_zero_mask(unsigned long bits) in create_zero_mask() argument
43 bits = (bits - 1) & ~bits; in create_zero_mask()
44 return bits >> 7; in create_zero_mask()
|
| /arch/x86/include/asm/ |
| D | word-at-a-time.h | 46 static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_t… in has_zero() argument
49 *bits = mask; in has_zero()
53 static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_a… in prep_zero_mask() argument
55 return bits; in prep_zero_mask()
58 static inline unsigned long create_zero_mask(unsigned long bits) in create_zero_mask() argument
60 bits = (bits - 1) & ~bits; in create_zero_mask()
61 return bits >> 7; in create_zero_mask()
|
| /arch/arm/include/asm/ |
| D | word-at-a-time.h | 18 static inline unsigned long has_zero(unsigned long a, unsigned long *bits, in has_zero() argument
22 *bits = mask; in has_zero()
26 #define prep_zero_mask(a, bits, c) (bits) argument
28 static inline unsigned long create_zero_mask(unsigned long bits) in create_zero_mask() argument
30 bits = (bits - 1) & ~bits; in create_zero_mask()
31 return bits >> 7; in create_zero_mask()
|
| /arch/sparc/kernel/ |
| D | btext.c | 22 static void draw_byte_32(unsigned char *bits, unsigned int *base, int rb);
23 static void draw_byte_16(unsigned char *bits, unsigned int *base, int rb);
24 static void draw_byte_8(unsigned char *bits, unsigned int *base, int rb);
243 int l, bits; in draw_byte_32() local
249 bits = *font++; in draw_byte_32()
250 base[0] = (-(bits >> 7) & fg) ^ bg; in draw_byte_32()
251 base[1] = (-((bits >> 6) & 1) & fg) ^ bg; in draw_byte_32()
252 base[2] = (-((bits >> 5) & 1) & fg) ^ bg; in draw_byte_32()
253 base[3] = (-((bits >> 4) & 1) & fg) ^ bg; in draw_byte_32()
254 base[4] = (-((bits >> 3) & 1) & fg) ^ bg; in draw_byte_32()
[all …]
|
| /arch/mips/lantiq/falcon/ |
| D | sysctrl.c | 88 & clk->bits) != test)); in sysctl_wait()
91 clk->module, clk->bits, test, in sysctl_wait()
92 sysctl_r32(clk->module, reg) & clk->bits); in sysctl_wait()
97 sysctl_w32(clk->module, clk->bits, SYSCTL_CLKEN); in sysctl_activate()
98 sysctl_w32(clk->module, clk->bits, SYSCTL_ACT); in sysctl_activate()
99 sysctl_wait(clk, clk->bits, SYSCTL_ACTS); in sysctl_activate()
105 sysctl_w32(clk->module, clk->bits, SYSCTL_CLKCLR); in sysctl_deactivate()
106 sysctl_w32(clk->module, clk->bits, SYSCTL_DEACT); in sysctl_deactivate()
112 sysctl_w32(clk->module, clk->bits, SYSCTL_CLKEN); in sysctl_clken()
113 sysctl_w32(clk->module, clk->bits, SYSCTL_ACT); in sysctl_clken()
[all …]
|
| /arch/um/include/asm/ |
| D | page.h | 42 #define pte_get_bits(p, bits) ((p).pte & (bits)) argument
43 #define pte_set_bits(p, bits) ((p).pte |= (bits)) argument
44 #define pte_clear_bits(p, bits) ((p).pte &= ~(bits)) argument
69 #define pte_get_bits(p, bits) ((p).pte & (bits)) argument
70 #define pte_set_bits(p, bits) ((p).pte |= (bits)) argument
71 #define pte_clear_bits(p, bits) ((p).pte &= ~(bits)) argument
|
| /arch/arm/boot/dts/ |
| D | omap3-devkit8000-lcd-common.dtsi | 59 ti,x-min = /bits/ 16 <0x0>;
60 ti,x-max = /bits/ 16 <0x0fff>;
61 ti,y-min = /bits/ 16 <0x0>;
62 ti,y-max = /bits/ 16 <0x0fff>;
63 ti,x-plate-ohms = /bits/ 16 <180>;
64 ti,pressure-max = /bits/ 16 <255>;
65 ti,debounce-max = /bits/ 16 <10>;
66 ti,debounce-tol = /bits/ 16 <5>;
67 ti,debounce-rep = /bits/ 16 <1>;
69 ti,settle-delay-usec = /bits/ 16 <150>;
|
| D | exynos4212.dtsi | 54 opp-hz = /bits/ 64 <200000000>;
59 opp-hz = /bits/ 64 <300000000>;
64 opp-hz = /bits/ 64 <400000000>;
69 opp-hz = /bits/ 64 <500000000>;
74 opp-hz = /bits/ 64 <600000000>;
79 opp-hz = /bits/ 64 <700000000>;
84 opp-hz = /bits/ 64 <800000000>;
89 opp-hz = /bits/ 64 <900000000>;
94 opp-hz = /bits/ 64 <1000000000>;
99 opp-hz = /bits/ 64 <1100000000>;
[all …]
|
| D | exynos4412.dtsi | 68 opp-hz = /bits/ 64 <200000000>;
73 opp-hz = /bits/ 64 <300000000>;
78 opp-hz = /bits/ 64 <400000000>;
83 opp-hz = /bits/ 64 <500000000>;
88 opp-hz = /bits/ 64 <600000000>;
93 opp-hz = /bits/ 64 <700000000>;
98 opp-hz = /bits/ 64 <800000000>;
104 opp-hz = /bits/ 64 <900000000>;
109 opp-hz = /bits/ 64 <1000000000>;
114 opp-hz = /bits/ 64 <1100000000>;
[all …]
|
| D | exynos5800.dtsi | 61 opp-hz = /bits/ 64 <600000000>;
66 opp-hz = /bits/ 64 <500000000>;
71 opp-hz = /bits/ 64 <400000000>;
76 opp-hz = /bits/ 64 <300000000>;
81 opp-hz = /bits/ 64 <200000000>;
113 opp-hz = /bits/ 64 <500000000>;
118 opp-hz = /bits/ 64 <400000000>;
123 opp-hz = /bits/ 64 <300000000>;
128 opp-hz = /bits/ 64 <200000000>;
|
| D | at91sam9261ek.dts | 45 bits-per-pixel = <16>;
131 ti,x-min = /bits/ 16 <150>;
132 ti,x-max = /bits/ 16 <3830>;
133 ti,y-min = /bits/ 16 <190>;
134 ti,y-max = /bits/ 16 <3830>;
135 ti,vref-delay-usecs = /bits/ 16 <450>;
136 ti,x-plate-ohms = /bits/ 16 <450>;
137 ti,y-plate-ohms = /bits/ 16 <250>;
138 ti,pressure-max = /bits/ 16 <15000>;
139 ti,debounce-rep = /bits/ 16 <0>;
[all …]
|
| /arch/mips/math-emu/ |
| D | dp_sqrt.c | 97 yh = y.bits >> 32; in ieee754dp_sqrt()
100 y.bits = ((u64) yh << 32) | (y.bits & 0xffffffff); in ieee754dp_sqrt()
106 y.bits -= 0x0010000600000000LL; in ieee754dp_sqrt()
107 y.bits &= 0xffffffff00000000LL; in ieee754dp_sqrt()
130 if (ieee754_csr.sx & IEEE754_INEXACT || t.bits != y.bits) { in ieee754dp_sqrt()
134 t.bits -= 1; in ieee754dp_sqrt()
142 y.bits += 1; in ieee754dp_sqrt()
145 t.bits += 1; in ieee754dp_sqrt()
|
| /arch/x86/entry/vdso/ |
| D | vdso2c.c | 126 #define GLE(x, bits, ifnot) \ argument
128 (sizeof(*(x)) == bits/8), \
129 (__typeof__(*(x)))get_unaligned_le##bits(x), ifnot)
138 #define PLE(x, val, bits, ifnot) \ argument
140 (sizeof(*(x)) == bits/8), \
141 put_unaligned_le##bits((val), (x)), ifnot)
153 #define BITSFUNC3(name, bits, suffix) name##bits##suffix argument
154 #define BITSFUNC2(name, bits, suffix) BITSFUNC3(name, bits, suffix) argument
159 #define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x argument
160 #define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x) argument
|
| /arch/arm64/kernel/ |
| D | setup.c | 123 u32 i, affinity, fs[4], bits[4], ls; in smp_build_mpidr_hash() local
145 bits[i] = ls - fs[i]; in smp_build_mpidr_hash()
158 mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0]; in smp_build_mpidr_hash()
160 (bits[1] + bits[0]); in smp_build_mpidr_hash()
162 fs[3] - (bits[2] + bits[1] + bits[0]); in smp_build_mpidr_hash()
164 mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0]; in smp_build_mpidr_hash()
171 mpidr_hash.bits); in smp_build_mpidr_hash()
|
| /arch/parisc/include/asm/ |
| D | hash.h | 117 hash_64(u64 a, unsigned int bits) in hash_64() argument
125 if (!__builtin_constant_p(bits)) in hash_64()
126 asm("" : "=q" (bits) : "0" (64 - bits)); in hash_64()
128 bits = 64 - bits; in hash_64()
140 return a >> bits; in hash_64()
|
| /arch/mips/cavium-octeon/executive/ |
| D | cvmx-helper-jtag.c | 87 uint32_t cvmx_helper_qlm_jtag_shift(int qlm, int bits, uint32_t data) in cvmx_helper_qlm_jtag_shift() argument
92 jtgd.s.shft_cnt = bits - 1; in cvmx_helper_qlm_jtag_shift()
100 return jtgd.s.shft_reg >> (32 - bits); in cvmx_helper_qlm_jtag_shift()
113 void cvmx_helper_qlm_jtag_shift_zeros(int qlm, int bits) in cvmx_helper_qlm_jtag_shift_zeros() argument
115 while (bits > 0) { in cvmx_helper_qlm_jtag_shift_zeros()
116 int n = bits; in cvmx_helper_qlm_jtag_shift_zeros()
120 bits -= n; in cvmx_helper_qlm_jtag_shift_zeros()
|
| /arch/arm64/boot/dts/nvidia/ |
| D | tegra210-p2371-2180.dts | 33 dev-ctrl = /bits/ 8 <0x80>;
34 init-brt = /bits/ 8 <0xff>;
43 rom-addr = /bits/ 8 <0x14>;
44 rom-val = /bits/ 8 <0x87>;
49 rom-addr = /bits/ 8 <0x13>;
50 rom-val = /bits/ 8 <0x01>;
|
| /arch/arm/mach-omap2/ |
| D | cm2xxx_3xxx.h | 64 static inline u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, in omap2_cm_rmw_mod_reg_bits() argument
71 v |= bits; in omap2_cm_rmw_mod_reg_bits()
89 static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) in omap2_cm_set_mod_reg_bits() argument
91 return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx); in omap2_cm_set_mod_reg_bits()
94 static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) in omap2_cm_clear_mod_reg_bits() argument
96 return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); in omap2_cm_clear_mod_reg_bits()
|
| /arch/ia64/kernel/ |
| D | perfmon_default_smpl.c | 197 arg->ovfl_ctrl.bits.notify_user = 0; in default_handler()
198 arg->ovfl_ctrl.bits.block_task = 0; in default_handler()
199 arg->ovfl_ctrl.bits.mask_monitoring = 0; in default_handler()
200 arg->ovfl_ctrl.bits.reset_ovfl_pmds = 1; /* reset before returning from interrupt handler */ in default_handler()
216 arg->ovfl_ctrl.bits.notify_user = 0; in default_handler()
217 arg->ovfl_ctrl.bits.block_task = 0; in default_handler()
218 arg->ovfl_ctrl.bits.mask_monitoring = 1; in default_handler()
219 arg->ovfl_ctrl.bits.reset_ovfl_pmds = 0; in default_handler()
221 arg->ovfl_ctrl.bits.notify_user = 1; in default_handler()
222 arg->ovfl_ctrl.bits.block_task = 1; /* ignored for non-blocking context */ in default_handler()
[all …]
|
| /arch/mips/vdso/ |
| D | genvdso.c | 81 #define BUILD_SWAP(bits) \ argument
82 static uint##bits##_t swap_uint##bits(uint##bits##_t val) \
84 return need_swap ? bswap_##bits(val) : val; \
91 #define __FUNC(name, bits) name##bits argument
92 #define _FUNC(name, bits) __FUNC(name, bits) argument
95 #define __ELF(x, bits) Elf##bits##_##x argument
96 #define _ELF(x, bits) __ELF(x, bits) argument
|
| /arch/ia64/sn/pci/pcibr/ |
| D | pcibr_reg.c | 26 void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, u64 bits) in pcireg_control_bit_clr() argument
33 __sn_clrq_relaxed(&ptr->tio.cp_control, bits); in pcireg_control_bit_clr()
36 __sn_clrq_relaxed(&ptr->pic.p_wid_control, bits); in pcireg_control_bit_clr()
46 void pcireg_control_bit_set(struct pcibus_info *pcibus_info, u64 bits) in pcireg_control_bit_set() argument
53 __sn_setq_relaxed(&ptr->tio.cp_control, bits); in pcireg_control_bit_set()
56 __sn_setq_relaxed(&ptr->pic.p_wid_control, bits); in pcireg_control_bit_set()
124 void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, u64 bits) in pcireg_intr_enable_bit_clr() argument
131 __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits); in pcireg_intr_enable_bit_clr()
134 __sn_clrq_relaxed(&ptr->pic.p_int_enable, bits); in pcireg_intr_enable_bit_clr()
144 void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, u64 bits) in pcireg_intr_enable_bit_set() argument
[all …]
|
| /arch/mips/lantiq/xway/ |
| D | gptu.c | 98 int ret = request_irq(irqres[clk->bits].start, timer_irq_handler, in gptu_enable()
106 GPTU_CON(clk->bits)); in gptu_enable()
107 gptu_w32(1, GPTU_RLD(clk->bits)); in gptu_enable()
108 gptu_w32(gptu_r32(GPTU_IRNEN) | BIT(clk->bits), GPTU_IRNEN); in gptu_enable()
109 gptu_w32(RUN_SEN | RUN_RL, GPTU_RUN(clk->bits)); in gptu_enable()
115 gptu_w32(0, GPTU_RUN(clk->bits)); in gptu_disable()
116 gptu_w32(0, GPTU_CON(clk->bits)); in gptu_disable()
117 gptu_w32(0, GPTU_RLD(clk->bits)); in gptu_disable()
118 gptu_w32(gptu_r32(GPTU_IRNEN) & ~BIT(clk->bits), GPTU_IRNEN); in gptu_disable()
119 free_irq(irqres[clk->bits].start, NULL); in gptu_disable()
[all …]
|