/arch/s390/pci/ |
D | pci_insn.c | 17 static inline void zpci_err_insn(u8 cc, u8 status, u64 req, u64 offset) in zpci_err_insn() argument 22 u8 cc; in zpci_err_insn() member 24 } __packed data = {req, offset, cc, status}; in zpci_err_insn() 32 u8 cc; in __mpcifc() local 38 : [cc] "=d" (cc), [req] "+d" (req), [fib] "+Q" (*fib) in __mpcifc() 41 return cc; in __mpcifc() 46 u8 cc, status; in zpci_mod_fc() local 49 cc = __mpcifc(req, fib, &status); in zpci_mod_fc() 50 if (cc == 2) in zpci_mod_fc() 52 } while (cc == 2); in zpci_mod_fc() [all …]
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/arch/x86/include/asm/ |
D | rmwcc.h | 8 #define __GEN_RMWcc(fullop, var, cc, ...) \ argument 10 asm_volatile_goto (fullop "; j" #cc " %l[cc_label]" \ 18 #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ argument 19 __GEN_RMWcc(op " " arg0, var, cc) 21 #define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \ argument 22 __GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val)) 28 #define __GEN_RMWcc(fullop, var, cc, ...) \ argument 31 asm volatile (fullop ";" CC_SET(cc) \ 32 : "+m" (var), CC_OUT(cc) (c) \ 37 #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ argument [all …]
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/arch/m68k/ |
D | Makefile | 21 CROSS_COMPILE := $(call cc-cross-prefix, \ 43 cpuflags-$(CONFIG_M5441x) := $(call cc-option,-mcpu=54455,-mcfv4e) 44 cpuflags-$(CONFIG_M54xx) := $(call cc-option,-mcpu=5475,-m5200) 45 cpuflags-$(CONFIG_M5407) := $(call cc-option,-mcpu=5407,-m5200) 46 cpuflags-$(CONFIG_M532x) := $(call cc-option,-mcpu=532x,-m5307) 47 cpuflags-$(CONFIG_M537x) := $(call cc-option,-mcpu=537x,-m5307) 48 cpuflags-$(CONFIG_M5307) := $(call cc-option,-mcpu=5307,-m5200) 49 cpuflags-$(CONFIG_M528x) := $(call cc-option,-mcpu=528x,-m5307) 50 cpuflags-$(CONFIG_M5275) := $(call cc-option,-mcpu=5275,-m5307) 51 cpuflags-$(CONFIG_M5272) := $(call cc-option,-mcpu=5272,-m5307) [all …]
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/arch/s390/include/asm/ |
D | cpu_mf.h | 161 int cc; in lcctl() local 167 : "=d" (cc) : "m" (ctl) : "cc"); in lcctl() 168 return cc; in lcctl() 175 int cc; in __ecctr() local 181 : "=d" (_content), "=d" (cc) : "d" (ctr) : "cc"); in __ecctr() 183 return cc; in __ecctr() 190 int cc; in ecctr() local 192 cc = __ecctr(ctr, &content); in ecctr() 193 if (!cc) in ecctr() 195 return cc; in ecctr() [all …]
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D | sigp.h | 44 int cc; in ____pcpu_sigp() local 50 : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc"); in ____pcpu_sigp() 52 return cc; in ____pcpu_sigp() 59 int cc; in __pcpu_sigp() local 61 cc = ____pcpu_sigp(addr, order, parm, &_status); in __pcpu_sigp() 62 if (status && cc == 1) in __pcpu_sigp() 64 return cc; in __pcpu_sigp()
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D | timex.h | 21 int cc; in set_tod_clock() local 27 : "=d" (cc) : "Q" (time) : "cc"); in set_tod_clock() 28 return cc; in set_tod_clock() 33 int cc; in store_tod_clock() local 39 : "=d" (cc), "=Q" (*time) : : "cc"); in store_tod_clock() 40 return cc; in store_tod_clock()
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D | cmpxchg.h | 41 int cc; \ 46 : [cc] "=d" (cc), [old] "+d" (__old1), "+d" (__old2) \ 50 !cc; \
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/arch/x86/ |
D | Makefile.um | 11 KBUILD_CFLAGS += $(call cc-option,-m32) 12 KBUILD_AFLAGS += $(call cc-option,-m32) 13 LINK-y += $(call cc-option,-m32) 24 cflags-y += $(call cc-option,-mpreferred-stack-boundary=2) 33 KBUILD_CFLAGS += $(shell if [ $(cc-version) -lt 0400 ] ; then \ 34 echo $(call cc-option,-fno-unit-at-a-time); \ 35 else echo $(call cc-option,-funit-at-a-time); fi ;) 59 KBUILD_CFLAGS += $(call cc-option,-funit-at-a-time)
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D | Makefile | 16 ifneq ($(call cc-option, -mpreferred-stack-boundary=4),) 19 else ifneq ($(call cc-option, -mstack-alignment=16),) 31 M16_CFLAGS := $(call cc-option, -m16, $(CODE16GCC_CFLAGS)) 61 KBUILD_CFLAGS += $(call cc-option,-mno-avx,) 68 biarch := $(call cc-option,-m32) 81 KBUILD_CFLAGS += $(call cc-option,$(cc_stack_align4)) 85 KBUILD_CFLAGS += $(call cc-ifversion, -lt, 0400, \ 86 $(call cc-option,-fno-unit-at-a-time)) 104 KBUILD_CFLAGS += $(call cc-option,-falign-jumps=1) 107 KBUILD_CFLAGS += $(call cc-option,-falign-loops=1) [all …]
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D | Makefile_32.cpu | 5 HAS_MTUNE := $(call cc-option-yn, -mtune=i386) 7 tune = $(call cc-option,-mtune=$(1),$(2)) 9 tune = $(call cc-option,-mcpu=$(1),$(2)) 12 align := $(cc-option-align) 26 cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon) 29 cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586) 30 cflags-$(CONFIG_MWINCHIP3D) += $(call cc-option,-march=winchip2,-march=i586) 31 cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) $(align)-functions=0 $(align)… 32 cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686) 35 cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686))… [all …]
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/arch/powerpc/ |
D | Makefile | 15 HAS_BIARCH := $(call cc-option-yn, -m32) 67 KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-save-toc-indirect) 76 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mabi=elfv1) 77 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mcall-aixdesc) 78 aflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mabi=elfv1) 83 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mbig-endian) 84 ifneq ($(cc-name),clang) 88 aflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mbig-endian) 103 ifeq ($(call cc-option-yn,-mcmodel=medium),y) 118 CFLAGS-$(CONFIG_PPC64) := $(call cc-option,-mtraceback=no) [all …]
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/arch/blackfin/mach-bf561/include/mach/ |
D | mem_map.h | 140 if cc jump 2f; \ 141 cc = preg == 0x0; \ 144 if !cc jump 3f; \ 147 cc = !cc; /* restore cc to 0 */ \ 150 cc = preg == 0x0; \ 153 if cc jump 4f; \ 155 cc = !cc; /* restore cc to 1 */ \ 166 cc = bittst(dreg, 0); \ 167 if !cc jump 1f; \
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/arch/blackfin/mach-bf561/ |
D | atomic.S | 47 if cc jump .Ldone_corelock; 71 if cc jump .Ldone_corelock_noflush; 127 cc = r5 == 0; define 128 if cc jump 1f; 165 cc = r5 == 0; define 166 if cc jump 1f; 235 cc = r6 == 0; define 236 if cc jump .Lcache_synced 283 cc = bittst( r3, 0 ); define 284 r3 = cc; [all …]
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/arch/m68k/ifpsp060/src/ |
D | itest.S | 174 mov.w &0x0000,%cc 179 mov.w %cc,SCCR(%a6) 198 mov.w &0x0000,%cc 203 mov.w %cc,SCCR(%a6) 221 mov.w &0x0000,%cc 226 mov.w %cc,SCCR(%a6) 244 mov.w &0x0000,%cc 249 mov.w %cc,SCCR(%a6) 268 mov.w &0x0000,%cc 273 mov.w %cc,SCCR(%a6) [all …]
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/arch/blackfin/mach-common/ |
D | entry.S | 56 cc = r6 == r7; define 57 if !cc jump _bfin_return_from_exception; 61 cc = R6 == R7; define 62 if cc jump _ex_dcplb_miss (BP); 65 cc = R6 == R7; define 66 if cc jump _ex_dcplb_viol (BP); 133 cc = r7 == r6; define 134 if cc jump _bfin_return_from_exception; 141 cc = bittst(r6, 4); define 142 if cc jump _bfin_return_from_exception; [all …]
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/arch/blackfin/lib/ |
D | divsi3.S | 48 cc = r0 < r1; define 49 if cc jump .Lret_zero; 51 cc = r2; define 52 if cc jump .Lidents; 54 cc = r2 <= r0; define 55 if cc jump .Lidents; 79 cc = bittst(r3, 30); define 80 if cc r0 = r1; 140 cc = bittst(r3,30); define 142 if !cc r0 = r2;
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D | smulsi3_highpart.S | 23 cc = ac0; define 24 R2 = cc; 27 cc = ac0; define 32 R2 = cc;
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D | strncmp.S | 34 if ! cc jump 3f; /* not equal, break out */ 36 if ! cc jump 4f; /* yes, all done */ 39 if ! cc jump 1b (bp); /* more to do, keep going */
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/arch/alpha/kernel/ |
D | time.c | 285 validate_cc_value(unsigned long cc) in validate_cc_value() argument 320 return cc; in validate_cc_value() 324 return cc; in validate_cc_value() 326 if (cc < cpu_hz[index].min - deviation in validate_cc_value() 327 || cc > cpu_hz[index].max + deviation) in validate_cc_value() 330 return cc; in validate_cc_value() 345 int cc, count = 0; in calibrate_cc_with_pit() local 361 cc = rpcc(); in calibrate_cc_with_pit() 365 cc = rpcc() - cc; in calibrate_cc_with_pit() 371 return ((long)cc * PIT_TICK_RATE) / (CALIBRATE_LATCH + 1); in calibrate_cc_with_pit()
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D | sys_jensen.c | 148 unsigned int cc; in jensen_device_interrupt() 150 __asm __volatile("rpcc %0" : "=r"(cc)); in jensen_device_interrupt() 153 if (cc - last_msg > ((JENSEN_CYCLES_PER_SEC) * 3) || in jensen_device_interrupt() 156 irq, count, cc-last_cc, get_irq_regs()->pc); in jensen_device_interrupt() 158 last_msg = cc; in jensen_device_interrupt() 161 last_cc = cc; in jensen_device_interrupt()
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/arch/sh/ |
D | Makefile | 14 …CROSS_COMPILE := $(call cc-cross-prefix, $(UTS_MACHINE)-linux- $(UTS_MACHINE)-linux-gnu- $(UTS_M… 33 cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,) 34 cflags-$(CONFIG_CPU_J2) += $(call cc-option,-mj2,) 35 cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \ 36 $(call cc-option,-m2a-nofpu,) \ 37 $(call cc-option,-m4-nofpu,) 38 cflags-$(CONFIG_CPU_SH3) := $(call cc-option,-m3,) 39 cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \ 40 $(call cc-option,-mno-implicit-fp,-m4-nofpu) 41 cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \ [all …]
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/arch/mips/ |
D | Makefile | 50 …CROSS_COMPILE := $(call cc-cross-prefix, $(tool-archpref)-linux- $(tool-archpref)-linux-gnu- $(t… 56 ifeq ($(call cc-option-yn,-mmcount-ra-address), y) 61 cflags-y += $(call cc-option, -mno-check-zero-division) 132 cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ 144 cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_M… 146 cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_IS… 149 cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_M… 151 cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_IS… 155 cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \ 157 cflags-$(CONFIG_CPU_R5500) += $(call cc-option,-march=r5500,-march=r5000) \ [all …]
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/arch/openrisc/ |
D | Makefile | 30 KBUILD_CFLAGS += $(call cc-option,-mhard-mul) 32 KBUILD_CFLAGS += $(call cc-option,-msoft-mul) 36 KBUILD_CFLAGS += $(call cc-option,-mhard-div) 38 KBUILD_CFLAGS += $(call cc-option,-msoft-div)
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/arch/mips/loongson64/ |
D | Platform | 8 $(call cc-option,-march=loongson2e,-march=r4600) 10 $(call cc-option,-march=loongson2f,-march=r4600) 30 # by GAS. The cc-option can't probe for this behaviour so -march=loongson3a 33 ifeq ($(call cc-ifversion, -ge, 0409, y), y) 36 $(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 39 $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 43 $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
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/arch/blackfin/kernel/ |
D | ftrace-entry.S | 88 cc = r2 == r3; define 89 if ! cc jump .Ldo_trace; 98 cc = r2 == r3; define 99 if ! cc jump _ftrace_graph_caller; 109 cc = r2 == r3; define 110 if ! cc jump _ftrace_graph_caller;
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