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Searched refs:cntval_bits (Results 1 – 8 of 8) sorted by relevance

/arch/tile/kernel/
Dperf_event.c76 int cntval_bits; /* counter width */ member
335 .cntval_bits = 32,
505 int shift = 64 - tile_pmu->cntval_bits; in tile_perf_event_update()
911 if (val & (1ULL << (tile_pmu->cntval_bits - 1))) in tile_pmu_handle_irq()
/arch/x86/events/intel/
Dp6.c224 .cntval_bits = 32,
Dknc.c306 .cntval_bits = 40,
Dp4.c1028 if (!overflow && (val & (1ULL << (x86_pmu.cntval_bits - 1)))) in p4_pmu_handle_irq()
1321 .cntval_bits = ARCH_P4_CNTRVAL_BITS,
Dcore.c3603 x86_pmu.cntval_bits = eax.split.bit_width; in intel_pmu_init()
/arch/x86/events/
Dcore.c69 int shift = 64 - x86_pmu.cntval_bits; in x86_perf_event_update()
1453 if (val & (1ULL << (x86_pmu.cntval_bits - 1))) in x86_pmu_handle_irq()
1816 pr_info("... bit width: %d\n", x86_pmu.cntval_bits); in init_hw_perf_events()
2251 userpg->pmc_width = x86_pmu.cntval_bits; in arch_perf_update_userpage()
2510 cap->bit_width_gp = x86_pmu.cntval_bits; in perf_get_x86_pmu_capability()
2511 cap->bit_width_fixed = x86_pmu.cntval_bits; in perf_get_x86_pmu_capability()
Dperf_event.h524 int cntval_bits; member
/arch/x86/events/amd/
Dcore.c637 .cntval_bits = 48,