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/arch/arm/lib/
Dlib1funcs.S40 .macro ARM_DIV_BODY dividend, divisor, result, curbit
44 clz \curbit, \divisor
48 mov \divisor, \divisor, lsl \result
54 @ Initially shift the divisor left 3 bits if possible,
58 tst \divisor, #0xe0000000
59 moveq \divisor, \divisor, lsl #3
63 @ Unless the divisor is very big, shift it up in multiples of
65 @ division loop. Continue shifting until the divisor is
67 1: cmp \divisor, #0x10000000
68 cmplo \divisor, \dividend
[all …]
Ddiv64.S53 bls 9f @ divisor is 0 or 1
55 beq 8f @ divisor is power of 2
62 @ Align divisor with upper part of dividend.
63 @ The aligned divisor is stored in yl preserving the original.
105 @ divisor for comparisons, considering the carry-out bit as well.
142 @ divisor at this point since divisor can not be smaller than 3 here.
150 8: @ Division by a power of 2: determine what that divisor order is
/arch/alpha/lib/
Ddivide.S55 #define divisor $1 macro
103 bis $25,$25,divisor
108 LONGIFY(divisor)
113 beq divisor, 9f /* div by zero */
124 1: cmpult divisor,modulus,compare
125 s8addq divisor,$31,divisor
129 1: cmpult divisor,modulus,compare
130 blt divisor, 2f
131 addq divisor,divisor,divisor
140 cmpule divisor,modulus,compare
[all …]
Dev6-divide.S65 #define divisor $1 macro
113 bis $25,$25,divisor # E :
119 LONGIFY(divisor) # E : U L L U
126 beq divisor, 9f /* div by zero */
143 1: cmpult divisor,modulus,compare # E :
144 s8addq divisor,$31,divisor # E :
148 1: cmpult divisor,modulus,compare # E :
151 blt divisor, 2f # U : U L U L
153 addq divisor,divisor,divisor # E :
171 cmpule divisor,modulus,compare # E :
[all …]
/arch/c6x/kernel/
Dc6x_ksyms.c19 extern int __c6xabi_divi(int dividend, int divisor);
22 extern unsigned __c6xabi_divu(unsigned dividend, unsigned divisor);
25 extern int __c6xabi_remi(int dividend, int divisor);
28 extern unsigned __c6xabi_remu(unsigned dividend, unsigned divisor);
31 extern int __c6xabi_divremi(int dividend, int divisor);
34 extern unsigned __c6xabi_divremu(unsigned dividend, unsigned divisor);
/arch/tile/lib/
Dexports.c64 uint32_t __udivsi3(uint32_t dividend, uint32_t divisor);
66 int32_t __divsi3(int32_t dividend, int32_t divisor);
68 uint64_t __udivdi3(uint64_t dividend, uint64_t divisor);
70 int64_t __divdi3(int64_t dividend, int64_t divisor);
72 uint32_t __umodsi3(uint32_t dividend, uint32_t divisor);
74 int32_t __modsi3(int32_t dividend, int32_t divisor);
76 uint64_t __umoddi3(uint64_t dividend, uint64_t divisor);
78 int64_t __moddi3(int64_t dividend, int64_t divisor);
/arch/mips/cavium-octeon/executive/
Dcvmx-helper-jtag.c50 uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000); in cvmx_helper_qlm_jtag_init() local
51 divisor = (divisor - 1) >> 2; in cvmx_helper_qlm_jtag_init()
53 while (divisor) { in cvmx_helper_qlm_jtag_init()
55 divisor = divisor >> 1; in cvmx_helper_qlm_jtag_init()
/arch/x86/include/asm/
Ddiv64.h42 static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder) in div_u64_rem() argument
52 if (upper >= divisor) { in div_u64_rem()
53 d.v32[1] = upper / divisor; in div_u64_rem()
54 upper %= divisor; in div_u64_rem()
57 "rm" (divisor), "0" (d.v32[0]), "1" (upper)); in div_u64_rem()
/arch/h8300/lib/
Dudivsi3.S30 shlr.l er2 ; make divisor < 2^16
34 shlr.l #2,er2 ; make divisor < 2^16
40 shlr.l #2,er2 ; make divisor < 2^16
55 ;; er1 contains divisor
56 ;; er2 contains shifted divisor
63 mulxu.w r0,er2 ; er2 = upper (AQ - 1) * divisor
67 sub.l er2,er3 ; er3 = dividend - (AQ - 1) * divisor
69 cmp.l er1,er3 ; is divisor < remainder?
/arch/powerpc/lib/
Ddiv64.S26 divwu r7,r5,r4 # if dividend.hi >= divisor,
27 mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
28 subf. r5,r0,r5 # dividend.hi %= divisor
35 srw r10,r10,r0 # the divisor right the same amount,
45 mulhwu r9,r11,r4 # multiply the estimate by the divisor,
46 subfc r6,r10,r6 # take the product from the divisor,
/arch/powerpc/boot/
Dvirtex.c32 u16 divisor; in virtex_ns16550_console_init() local
55 divisor = clk / (16 * spd); in virtex_ns16550_console_init()
61 out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF); in virtex_ns16550_console_init()
62 out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8); in virtex_ns16550_console_init()
Ddiv64.S26 divwu r7,r5,r4 # if dividend.hi >= divisor,
27 mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
28 subf. r5,r0,r5 # dividend.hi %= divisor
35 srw r10,r10,r0 # the divisor right the same amount,
45 mulhwu r9,r11,r4 # multiply the estimate by the divisor,
46 subfc r6,r10,r6 # take the product from the divisor,
/arch/arm/mach-orion5x/
Dtsx09-common.c31 const unsigned divisor = ((orion5x_tclk + (8 * 19200)) / (16 * 19200)); in qnap_tsx09_power_off() local
37 writel(divisor & 0xff, UART1_REG(DLL)); in qnap_tsx09_power_off()
38 writel((divisor >> 8) & 0xff, UART1_REG(DLM)); in qnap_tsx09_power_off()
/arch/metag/include/asm/
Ddiv64.h6 extern u64 div_u64(u64 dividend, u64 divisor);
7 extern s64 div_s64(s64 dividend, s64 divisor);
/arch/x86/kernel/
Dearly_printk.c131 static __init void early_serial_hw_init(unsigned divisor) in early_serial_hw_init() argument
142 serial_out(early_serial_base, DLL, divisor & 0xff); in early_serial_hw_init()
143 serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff); in early_serial_hw_init()
151 unsigned divisor; in early_serial_init() local
185 divisor = 115200 / baud; in early_serial_init()
192 early_serial_hw_init(divisor); in early_serial_init()
219 unsigned divisor; in early_pci_serial_init() local
305 divisor = 115200 / baud; in early_pci_serial_init()
308 early_serial_hw_init(divisor); in early_pci_serial_init()
/arch/x86/boot/
Dearly_serial_console.c28 unsigned divisor; in early_serial_init() local
35 divisor = 115200 / baud; in early_serial_init()
38 outb(divisor & 0xff, port + DLL); in early_serial_init()
39 outb((divisor >> 8) & 0xff, port + DLH); in early_serial_init()
/arch/sh/kernel/cpu/sh4/
Dclock-sh4-202.c33 int divisor = clk->parent->rate / rate; in frqcr3_lookup() local
37 if (frqcr3_divisors[i] == divisor) in frqcr3_lookup()
82 int divisor = frqcr3_divisors[i]; in shoc_clk_init() local
84 if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) in shoc_clk_init()
/arch/arm/boot/dts/
Dwm8750.dtsi126 divisor-reg = <0x300>;
133 divisor-reg = <0x304>;
140 divisor-reg = <0x320>;
147 divisor-reg = <0x310>;
202 divisor-reg = <0x350>;
211 divisor-reg = <0x330>;
212 divisor-mask = <0x3f>;
221 divisor-reg = <0x3A0>;
230 divisor-reg = <0x3A4>;
Dwm8650.dtsi120 divisor-reg = <0x300>;
127 divisor-reg = <0x304>;
134 divisor-reg = <0x320>;
141 divisor-reg = <0x310>;
164 divisor-reg = <0x328>;
165 divisor-mask = <0x3f>;
Dwm8850.dtsi137 divisor-reg = <0x300>;
144 divisor-reg = <0x304>;
151 divisor-reg = <0x320>;
158 divisor-reg = <0x310>;
197 divisor-reg = <0x350>;
206 divisor-reg = <0x330>;
207 divisor-mask = <0x3f>;
Dwm8505.dtsi116 divisor-reg = <0x300>;
123 divisor-reg = <0x304>;
130 divisor-reg = <0x350>;
137 divisor-reg = <0x310>;
192 divisor-reg = <0x328>;
193 divisor-mask = <0x3f>;
/arch/arm/mach-pxa/
Dviper.c169 unsigned int divisor = 0; in viper_set_core_cpu_voltage() local
173 v = "1.0"; divisor = 0xfff; in viper_set_core_cpu_voltage()
175 v = "1.1"; divisor = 0xde5; in viper_set_core_cpu_voltage()
177 v = "1.3"; divisor = 0x325; in viper_set_core_cpu_voltage()
188 step = divisor; in viper_set_core_cpu_voltage()
189 else if (current_voltage_divisor < divisor - STEP) in viper_set_core_cpu_voltage()
191 else if (current_voltage_divisor > divisor + STEP) in viper_set_core_cpu_voltage()
194 step = divisor; in viper_set_core_cpu_voltage()
219 } while (current_voltage_divisor != divisor); in viper_set_core_cpu_voltage()
/arch/mips/ralink/
Dtimer.c74 static int rt_timer_config(struct rt_timer *rt, unsigned long divisor) in rt_timer_config() argument
76 if (rt->timer_freq < divisor) in rt_timer_config()
79 rt->timer_div = divisor; in rt_timer_config()
/arch/m68k/ifpsp060/src/
Dilsp.S74 # 0x4(sp) = divisor #
89 # codes before performing the final "rts". If the divisor was equal to #
134 mov.l 0x8(%a6),%d7 # fetch divisor
136 beq.w ldiv64eq0 # divisor is = 0!!!
145 # save the sign of the divisor
146 # make divisor unsigned if it's negative
165 # - is (hi(dividend) == 0 && (divisor <= lo(dividend))) ? (32-bit div)
173 cmp.l %d7,%d6 # is (divisor <= lo(dividend))
272 # where U,V are words of the quadword dividend and longword divisor, #
276 # in %d6. The divisor must be in the variable ddivisor, and the #
[all …]
/arch/arm/common/
Dicst.c33 u32 divisor = (vco.r + 2) * p->s2div[vco.s]; in icst_hz() local
35 do_div(dividend, divisor); in icst_hz()

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