/arch/mips/oprofile/ |
D | op_model_loongson2.c | 63 if (cfg[0].enabled) { in loongson2_reg_setup() 68 if (cfg[1].enabled) { in loongson2_reg_setup() 73 if (cfg[0].enabled || cfg[1].enabled) { in loongson2_reg_setup() 83 reg.cnt1_enabled = cfg[0].enabled; in loongson2_reg_setup() 84 reg.cnt2_enabled = cfg[1].enabled; in loongson2_reg_setup() 110 int enabled; in loongson2_perfcount_handler() local 113 enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE; in loongson2_perfcount_handler() 114 if (!enabled) in loongson2_perfcount_handler() 116 enabled = reg.cnt1_enabled | reg.cnt2_enabled; in loongson2_perfcount_handler() 117 if (!enabled) in loongson2_perfcount_handler()
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D | op_model_loongson3.c | 71 if (ctr[0].enabled) { in loongson3_reg_setup() 81 if (ctr[1].enabled) { in loongson3_reg_setup() 91 if (ctr[0].enabled) in loongson3_reg_setup() 93 if (ctr[1].enabled) in loongson3_reg_setup() 98 reg.ctr1_enable = ctr[0].enabled; in loongson3_reg_setup() 99 reg.ctr2_enable = ctr[1].enabled; in loongson3_reg_setup()
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/arch/mips/mm/ |
D | sc-debugfs.c | 20 bool enabled = bc_prefetch_is_enabled(); in sc_prefetch_read() local 23 buf[0] = enabled ? 'Y' : 'N'; in sc_prefetch_read() 36 bool enabled; in sc_prefetch_write() local 44 err = strtobool(buf, &enabled); in sc_prefetch_write() 48 if (enabled) in sc_prefetch_write()
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/arch/alpha/oprofile/ |
D | op_model_ev4.c | 39 ctl |= (ctr[0].enabled ? ctr[0].event << 8 : 14 << 8); in ev4_reg_setup() 40 ctl |= (ctr[1].enabled ? (ctr[1].event - 16) << 32 : 7ul << 32); in ev4_reg_setup() 54 ctl |= (ctr[0].enabled && hilo) << 3; in ev4_reg_setup() 62 ctl |= (ctr[1].enabled && hilo); in ev4_reg_setup() 98 if (!ctr[which].enabled) in ev4_handle_interrupt()
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D | op_model_ev6.c | 29 if (ctr[0].enabled && ctr[0].event) in ev6_reg_setup() 31 if (ctr[1].enabled) in ev6_reg_setup() 48 if (!ctr[i].enabled) in ev6_reg_setup()
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/arch/m68k/coldfire/ |
D | clk.c | 32 clk->enabled = 1; in __clk_init_enabled() 38 clk->enabled = 0; in __clk_init_disabled() 93 if ((clk->enabled++ == 0) && clk->clk_ops) in clk_enable() 109 if ((--clk->enabled == 0) && clk->clk_ops) in clk_disable() 117 if (clk->enabled != 0) in clk_put()
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/arch/um/os-Linux/ |
D | signal.c | 77 int enabled; in sig_handler() local 79 enabled = signals_enabled; in sig_handler() 80 if (!enabled && (sig == SIGIO)) { in sig_handler() 89 set_signals(enabled); in sig_handler() 109 int enabled; in timer_alarm_handler() local 111 enabled = signals_enabled; in timer_alarm_handler() 125 set_signals(enabled); in timer_alarm_handler()
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/arch/arm/mach-w90x900/ |
D | clock.c | 37 if (clk->enabled++ == 0) in clk_enable() 49 WARN_ON(clk->enabled == 0); in clk_disable() 52 if (--clk->enabled == 0) in clk_disable()
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D | irq.c | 35 unsigned int enabled; member 63 if (group_irq->enabled++ == 0) in group_irq_enable() 74 WARN_ON(group_irq->enabled == 0); in group_irq_disable() 77 if (--group_irq->enabled == 0) in group_irq_disable()
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/arch/avr32/oprofile/ |
D | op_model_avr32.c | 29 unsigned long enabled; member 80 if (ctr->enabled && (pccr & ctr->flag_mask)) { in avr32_perf_counter_interrupt() 86 if (ctr->enabled && (pccr & ctr->flag_mask)) { in avr32_perf_counter_interrupt() 92 if (ctr->enabled && (pccr & ctr->flag_mask)) { in avr32_perf_counter_interrupt() 111 &counter[i].enabled); in avr32_perf_counter_create_files() 155 if (!ctr->enabled) in avr32_perf_counter_setup()
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/arch/arm/mach-sa1100/ |
D | clock.c | 28 unsigned int enabled; member 75 if (clk->enabled++ == 0) in clk_enable() 89 WARN_ON(clk->enabled == 0); in clk_disable() 91 if (--clk->enabled == 0) in clk_disable()
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/arch/arm/include/debug/ |
D | samsung.S | 58 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? 60 @ FIFO enabled... 79 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? 81 @ FIFO enabled...
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/arch/avr32/mach-at32ap/ |
D | clock.h | 25 void (*mode)(struct clk *clk, int enabled); 35 void pba_clk_mode(struct clk *clk, int enabled);
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/arch/powerpc/sysdev/ |
D | ppc4xx_cpm.c | 63 unsigned int enabled; member 129 if (idle_mode[mode].enabled) in cpm_idle_config() 133 idle_mode[i].enabled = 0; in cpm_idle_config() 135 idle_mode[mode].enabled = 1; in cpm_idle_config() 145 if (idle_mode[i].enabled) in cpm_idle_show() 196 if (idle_mode[CPM_IDLE_DOZE].enabled) in cpm_idle()
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/arch/arm/mach-mmp/ |
D | clock.c | 59 if (clk->enabled++ == 0) in clk_enable() 70 WARN_ON(clk->enabled == 0); in clk_disable() 73 if (--clk->enabled == 0) in clk_disable()
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/arch/m68k/ifpsp060/ |
D | fskeleton.S | 70 | This is the exit point for the 060FPSP when an enabled overflow exception 72 | for enabled overflow conditions. The exception stack frame is an overflow 89 | This is the exit point for the 060FPSP when an enabled underflow exception 91 | for enabled underflow conditions. The exception stack frame is an underflow 107 | This is the exit point for the 060FPSP when an enabled operand error exception 109 | for enabled operand error exceptions. The exception stack frame is an operand error 126 | This is the exit point for the 060FPSP when an enabled signalling NaN exception 128 | for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN 145 | This is the exit point for the 060FPSP when an enabled divide-by-zero exception 147 | for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero [all …]
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/arch/arm/kernel/ |
D | head-nommu.S | 77 orr r6, r6, #(1 << MPU_RSR_EN) @ Set region enabled bit 228 setup_region r0, r5, r6, MPU_DATA_SIDE @ PHYS_OFFSET, shared, enabled 230 setup_region r0, r5, r6, MPU_INSTR_SIDE @ PHYS_OFFSET, shared, enabled 239 mov r6, #MPU_RSR_ALL_MEM @ 4GB region, enabled 241 setup_region r0, r5, r6, MPU_DATA_SIDE @ 0x0, BG region, enabled 243 setup_region r0, r5, r6, MPU_INSTR_SIDE @ 0x0, BG region, enabled 255 setup_region r0, r5, r6, MPU_DATA_SIDE @ VECTORS_BASE, PL0 NA, enabled 257 setup_region r0, r5, r6, MPU_INSTR_SIDE @ VECTORS_BASE, PL0 NA, enabled
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/arch/arm/include/asm/ |
D | hw_breakpoint.h | 17 enabled : 1; 30 (ctrl.privilege << 1) | ctrl.enabled; in encode_ctrl_reg() 36 ctrl->enabled = reg & 0x1; in decode_ctrl_reg()
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/arch/mips/include/asm/mach-ralink/ |
D | pinmux.h | 38 int enabled; member 43 int enabled; member
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/arch/arm64/include/asm/ |
D | hw_breakpoint.h | 31 enabled : 1; member 49 ctrl.enabled; in encode_ctrl_reg() 60 ctrl->enabled = reg & 0x1; in decode_ctrl_reg()
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/arch/um/drivers/ |
D | chan_kern.c | 157 if (chan->enabled) in enable_chan() 164 chan->enabled = 1; in enable_chan() 197 if (chan->input && chan->enabled) in free_irqs() 199 if (chan->output && chan->enabled) in free_irqs() 201 chan->enabled = 0; in free_irqs() 218 if (chan->input && chan->enabled) in close_one_chan() 220 if (chan->output && chan->enabled) in close_one_chan() 222 chan->enabled = 0; in close_one_chan() 247 if (chan && chan->enabled) in deactivate_chan() 253 if (chan && chan->enabled) in reactivate_chan() [all …]
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/arch/arm/boot/dts/ |
D | aks-cdu.dts | 33 linux,rs485-enabled-at-boot-time; 39 linux,rs485-enabled-at-boot-time; 45 linux,rs485-enabled-at-boot-time;
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/arch/s390/kernel/ |
D | nospec-branch.c | 9 bool enabled; in nobp_setup_early() local 12 rc = kstrtobool(str, &enabled); in nobp_setup_early() 15 if (enabled && test_facility(82)) { in nobp_setup_early()
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/arch/x86/kernel/ |
D | kgdb.c | 197 unsigned enabled; member 215 if (!breakinfo[breakno].enabled) in kgdb_correct_hw_break() 298 if (breakinfo[i].addr == addr && breakinfo[i].enabled) in kgdb_remove_hw_break() 307 breakinfo[i].enabled = 0; in kgdb_remove_hw_break() 319 if (!breakinfo[i].enabled) in kgdb_remove_all_hw_break() 333 breakinfo[i].enabled = 0; in kgdb_remove_all_hw_break() 343 if (!breakinfo[i].enabled) in kgdb_set_hw_break() 385 breakinfo[i].enabled = 1; in kgdb_set_hw_break() 407 if (!breakinfo[i].enabled) in kgdb_disable_hw_debug() 654 if (breakinfo[i].enabled) in kgdb_hw_overflow_handler()
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/arch/arm/mach-omap2/ |
D | vp.c | 55 vp->enabled = false; in omap_vp_init() 214 if (vp->enabled) in omap_vp_enable() 230 vp->enabled = true; in omap_vp_enable() 259 if (!vp->enabled) { in omap_vp_disable() 279 vp->enabled = false; in omap_vp_disable()
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