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Searched refs:eth (Results 1 – 25 of 60) sorted by relevance

123

/arch/mips/cavium-octeon/
Docteon-platform.c461 static void __init octeon_fdt_set_phy(int eth, int phy_addr) in octeon_fdt_set_phy() argument
473 phy_handle = fdt_getprop(initial_boot_params, eth, "phy-handle", NULL); in octeon_fdt_set_phy()
480 alt_phy_handle = fdt_getprop(initial_boot_params, eth, "cavium,alt-phy-handle", NULL); in octeon_fdt_set_phy()
490 fdt_nop_property(initial_boot_params, eth, "phy-handle"); in octeon_fdt_set_phy()
492 fdt_nop_property(initial_boot_params, eth, "cavium,alt-phy-handle"); in octeon_fdt_set_phy()
506 phy_prop = fdt_get_property(initial_boot_params, eth, "phy-handle", NULL); in octeon_fdt_set_phy()
509 fdt_nop_property(initial_boot_params, eth, "phy-handle"); in octeon_fdt_set_phy()
510 alt_prop = fdt_get_property_w(initial_boot_params, eth, "cavium,alt-phy-handle", NULL); in octeon_fdt_set_phy()
590 int eth; in octeon_fdt_pip_port() local
595 eth = fdt_subnode_offset(initial_boot_params, iface, name_buffer); in octeon_fdt_pip_port()
[all …]
/arch/xtensa/platforms/xtfpga/
Dsetup.c147 struct device_node *eth = NULL; in machine_setup() local
149 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc"))) in machine_setup()
150 update_local_mac(eth); in machine_setup()
/arch/um/drivers/
Dnet_kern.c570 static int check_transport(struct transport *transport, char *eth, int n, in check_transport() argument
576 if (strncmp(eth, transport->name, len)) in check_transport()
579 eth += len; in check_transport()
580 if (*eth == ',') in check_transport()
581 eth++; in check_transport()
582 else if (*eth != '\0') in check_transport()
589 if (!transport->setup(eth, mac_out, *init_out)) { in check_transport()
599 struct eth_init *eth; in register_transport() local
610 eth = list_entry(ele, struct eth_init, list); in register_transport()
611 match = check_transport(new, eth->init, eth->index, &init, in register_transport()
[all …]
/arch/cris/include/arch-v32/mach-a3/mach/
Dstartup.inc48 ;; If eth_mdio, eth, geth bits are set in hwprot, don't
51 move.d 0xFC000000, $r2 ; pins 25..0 are eth_mdio, eth, geth
54 btstq REG_BIT(pinmux, rw_hwprot, eth), $r0
55 GIO_SET_P 0x00FFFF00, $r2 ;; pins 8..23 are eth
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
Dintr_vect_defs.h251 unsigned int eth : 1; member
264 unsigned int eth : 1; member
276 unsigned int eth : 1; member
288 unsigned int eth : 1; member
Dclkgen_defs.h103 unsigned int eth : 1; member
/arch/arm/boot/dts/
Dimx1-apf9328.dts62 eth: eth@4,c00000 { label
Dorion5x.dtsi180 eth: ethernet-controller@72000 { label
181 compatible = "marvell,orion-eth";
189 compatible = "marvell,orion-eth-port";
Dspear1310.dtsi140 gmac1: eth@5c400000 {
149 gmac2: eth@5c500000 {
158 gmac3: eth@5c600000 {
167 gmac4: eth@5c700000 {
Ddove-d2plug.dts44 &eth { status = "okay"; };
Dorion5x-mv88f5181.dtsi46 &eth {
Dkirkwood.dtsi313 compatible = "marvell,kirkwood-eth";
322 compatible = "marvell,kirkwood-eth-port";
344 compatible = "marvell,kirkwood-eth";
355 compatible = "marvell,kirkwood-eth-port";
Ddove-cubox.dts74 &eth { status = "okay"; };
Dspear1310-evb.dts53 eth {
168 gmac0: eth@e2000000 {
Dstih418-clock.dtsi194 "clk-eth-phyref",
195 "clk-eth-ref-phyclk",
Dstih407-clock.dtsi191 "clk-eth-phy",
192 "clk-eth-ref-phyclk",
Dspear310-evb.dts97 gmac: eth@e0800000 {
Dspear3xx.dtsi55 gmac: eth@e0800000 {
Dspear320-evb.dts93 gmac: eth@e0800000 {
/arch/powerpc/boot/dts/
Dc2k.dts95 compatible = "marvell,mv64360-eth-group";
99 compatible = "marvell,mv64360-eth";
108 compatible = "marvell,mv64360-eth";
117 compatible = "marvell,mv64360-eth";
/arch/cris/arch-v32/mach-a3/
Dpinmux.c103 clk_ctrl.eth = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
107 hwprot.eth = hwprot.eth_mdio = regk_pinmux_yes; in crisv32_pinmux_alloc_fixed()
282 hwprot.eth = hwprot.eth_mdio = hwprot.geth = regk_pinmux_no; in crisv32_pinmux_dealloc_fixed()
/arch/xtensa/platforms/iss/
Dnetwork.c681 struct iss_net_init *eth; in iss_net_init() local
682 eth = list_entry(ele, struct iss_net_init, list); in iss_net_init()
683 iss_net_configure(eth->index, eth->init); in iss_net_init()
/arch/arm/mach-mmp/
Dclock-pxa168.c61 static APMU_CLK(eth, ETH, 0x09, 0);
Dpxa168.c113 PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
/arch/cris/include/arch-v32/arch/hwregs/
DMakefile53 REGDESC += $(BASEDIR)/io/eth/rtl/eth_regs.r
106 eth_defs.h: $(BASEDIR)/io/eth/rtl/eth_regs.r

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