Home
last modified time | relevance | path

Searched refs:i (Results 1 – 25 of 2107) sorted by relevance

12345678910>>...85

/arch/x86/include/asm/
Dxor.h63 #define BLK64(pf, op, i) \ argument
64 pf(i) \
65 op(i, 0) \
66 op(i + 1, 1) \
67 op(i + 2, 2) \
68 op(i + 3, 3)
79 #define BLOCK(i) \ in xor_sse_2() argument
80 LD(i, 0) \ in xor_sse_2()
81 LD(i + 1, 1) \ in xor_sse_2()
82 PF1(i) \ in xor_sse_2()
[all …]
Dxor_32.h40 #define BLOCK(i) \ in xor_pII_mmx_2() argument
41 LD(i, 0) \ in xor_pII_mmx_2()
42 LD(i + 1, 1) \ in xor_pII_mmx_2()
43 LD(i + 2, 2) \ in xor_pII_mmx_2()
44 LD(i + 3, 3) \ in xor_pII_mmx_2()
45 XO1(i, 0) \ in xor_pII_mmx_2()
46 ST(i, 0) \ in xor_pII_mmx_2()
47 XO1(i+1, 1) \ in xor_pII_mmx_2()
48 ST(i+1, 1) \ in xor_pII_mmx_2()
49 XO1(i + 2, 2) \ in xor_pII_mmx_2()
[all …]
/arch/arm/mach-pxa/
Dmfp-pxa2xx.c138 int i, gpio; in pxa2xx_mfp_config() local
140 for (i = 0, c = mfp_cfgs; i < num; i++, c++) { in pxa2xx_mfp_config()
228 int i; in pxa25x_mfp_init() local
236 for (i = 0; i <= pxa_last_gpio; i++) in pxa25x_mfp_init()
237 gpio_desc[i].valid = 1; in pxa25x_mfp_init()
239 for (i = 0; i <= 15; i++) { in pxa25x_mfp_init()
240 gpio_desc[i].can_wakeup = 1; in pxa25x_mfp_init()
241 gpio_desc[i].mask = GPIO_bit(i); in pxa25x_mfp_init()
247 for (i = 86; i <= pxa_last_gpio; i++) in pxa25x_mfp_init()
248 gpio_desc[i].dir_inverted = 1; in pxa25x_mfp_init()
[all …]
Dam300epd.c109 int i; in am300_init_gpio_regs() local
113 for (i = 0; i < ARRAY_SIZE(gpios); i++) { in am300_init_gpio_regs()
114 err = gpio_request(gpios[i], gpio_names[i]); in am300_init_gpio_regs()
117 "gpio %s, err=%d\n", gpio_names[i], err); in am300_init_gpio_regs()
123 for (i = DB0_GPIO_PIN; i <= DB15_GPIO_PIN; i++) { in am300_init_gpio_regs()
124 sprintf(dbname, "DB%d", i); in am300_init_gpio_regs()
125 err = gpio_request(i, dbname); in am300_init_gpio_regs()
128 "gpio %d, err=%d\n", i, err); in am300_init_gpio_regs()
147 for (i = DB0_GPIO_PIN; i <= DB15_GPIO_PIN; i++) in am300_init_gpio_regs()
148 gpio_direction_output(i, 0); in am300_init_gpio_regs()
[all …]
/arch/x86/oprofile/
Dop_model_ppro.c35 int i; in ppro_shutdown() local
37 for (i = 0; i < num_counters; ++i) { in ppro_shutdown()
38 if (!msrs->counters[i].addr) in ppro_shutdown()
40 release_perfctr_nmi(MSR_P6_PERFCTR0 + i); in ppro_shutdown()
41 release_evntsel_nmi(MSR_P6_EVNTSEL0 + i); in ppro_shutdown()
47 int i; in ppro_fill_in_addresses() local
49 for (i = 0; i < num_counters; i++) { in ppro_fill_in_addresses()
50 if (!reserve_perfctr_nmi(MSR_P6_PERFCTR0 + i)) in ppro_fill_in_addresses()
52 if (!reserve_evntsel_nmi(MSR_P6_EVNTSEL0 + i)) { in ppro_fill_in_addresses()
53 release_perfctr_nmi(MSR_P6_PERFCTR0 + i); in ppro_fill_in_addresses()
[all …]
/arch/x86/mm/
Dtestmmiotrace.c21 static unsigned v16(unsigned i) in v16() argument
23 return i * 12 + 7; in v16()
26 static unsigned v32(unsigned i) in v32() argument
28 return i * 212371 + 13; in v32()
33 unsigned int i; in do_write_test() local
37 for (i = 0; i < 256; i++) in do_write_test()
38 iowrite8(i, p + i); in do_write_test()
40 for (i = 1024; i < (5 * 1024); i += 2) in do_write_test()
41 iowrite16(v16(i), p + i); in do_write_test()
43 for (i = (5 * 1024); i < (16 * 1024); i += 4) in do_write_test()
[all …]
/arch/sparc/kernel/
Dkgdb_32.c21 int i; in pt_regs_to_gdb_regs() local
24 for (i = 0; i < 15; i++) in pt_regs_to_gdb_regs()
25 gdb_regs[GDB_G1 + i] = regs->u_regs[UREG_G1 + i]; in pt_regs_to_gdb_regs()
28 for (i = 0; i < 8; i++) in pt_regs_to_gdb_regs()
29 gdb_regs[GDB_L0 + i] = win->locals[i]; in pt_regs_to_gdb_regs()
30 for (i = 0; i < 8; i++) in pt_regs_to_gdb_regs()
31 gdb_regs[GDB_I0 + i] = win->ins[i]; in pt_regs_to_gdb_regs()
33 for (i = GDB_F0; i <= GDB_F31; i++) in pt_regs_to_gdb_regs()
34 gdb_regs[i] = 0; in pt_regs_to_gdb_regs()
50 int i; in sleeping_thread_to_gdb_regs() local
[all …]
Dkgdb_64.c21 int i; in pt_regs_to_gdb_regs() local
24 for (i = 0; i < 15; i++) in pt_regs_to_gdb_regs()
25 gdb_regs[GDB_G1 + i] = regs->u_regs[UREG_G1 + i]; in pt_regs_to_gdb_regs()
28 for (i = 0; i < 8; i++) in pt_regs_to_gdb_regs()
29 gdb_regs[GDB_L0 + i] = win->locals[i]; in pt_regs_to_gdb_regs()
30 for (i = 0; i < 8; i++) in pt_regs_to_gdb_regs()
31 gdb_regs[GDB_I0 + i] = win->ins[i]; in pt_regs_to_gdb_regs()
33 for (i = GDB_F0; i <= GDB_F62; i++) in pt_regs_to_gdb_regs()
34 gdb_regs[i] = 0; in pt_regs_to_gdb_regs()
51 int i; in sleeping_thread_to_gdb_regs() local
[all …]
/arch/mips/lantiq/xway/
Dprom.c43 void __init ltq_soc_detect(struct ltq_soc_info *i) in ltq_soc_detect() argument
45 i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT; in ltq_soc_detect()
46 i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT; in ltq_soc_detect()
47 sprintf(i->rev_type, "1.%d", i->rev); in ltq_soc_detect()
48 switch (i->partnum) { in ltq_soc_detect()
51 i->name = SOC_DANUBE; in ltq_soc_detect()
52 i->type = SOC_TYPE_DANUBE; in ltq_soc_detect()
53 i->compatible = COMP_DANUBE; in ltq_soc_detect()
57 i->name = SOC_TWINPASS; in ltq_soc_detect()
58 i->type = SOC_TYPE_DANUBE; in ltq_soc_detect()
[all …]
/arch/unicore32/kernel/
Ddma.c41 int i, found = 0; in puv3_request_dma() local
51 for (i = 0; i < MAX_DMA_CHANNELS; i++) { in puv3_request_dma()
52 if ((dma_channels[i].prio == prio) && in puv3_request_dma()
53 !dma_channels[i].name) { in puv3_request_dma()
62 dma_channels[i].name = name; in puv3_request_dma()
63 dma_channels[i].irq_handler = irq_handler; in puv3_request_dma()
64 dma_channels[i].err_handler = err_handler; in puv3_request_dma()
65 dma_channels[i].data = data; in puv3_request_dma()
69 i = -ENODEV; in puv3_request_dma()
73 return i; in puv3_request_dma()
[all …]
/arch/arm/tools/
Dgen-mach-types37 for (i = 0; i < nr; i++)
38 if (num[i] ~ /..*/)
39 printf("#define %-30s %d\n", mach_type[i], num[i]);
43 for (i = 0; i < nr; i++)
44 if (num[i] ~ /..*/) {
45 printf("#ifdef %s\n", config[i]);
50 printf("# define machine_arch_type\t%s\n", mach_type[i]);
52 printf("# define %s()\t(machine_arch_type == %s)\n", machine_is[i], mach_type[i]);
54 printf("# define %s()\t(0)\n", machine_is[i]);
59 for (i = 0; i < nr; i++)
[all …]
/arch/blackfin/mach-common/
Dscb-init.c17 unsigned int i; in scb_mi_write() local
19 for (i = 0; i < slots; ++i) in scb_mi_write()
20 bfin_write32(scb_mi_arbw, (i << SCB_SLOT_OFFSET) | scb_mi_prio[i]); in scb_mi_write()
27 unsigned int i; in scb_mi_read() local
29 for (i = 0; i < slots; ++i) { in scb_mi_read()
30 bfin_write32(scb_mi_arbw, (0xFF << SCB_SLOT_OFFSET) | i); in scb_mi_read()
31 scb_mi_prio[i] = bfin_read32(scb_mi_arbw); in scb_mi_read()
38 unsigned int i, j; in init_scb() local
42 for (i = 0; scb_data[i].scb_mi_arbr > 0; ++i) { in init_scb()
44 scb_mi_write(scb_data[i].scb_mi_arbw, scb_data[i].scb_mi_slots, scb_data[i].scb_mi_prio); in init_scb()
[all …]
/arch/powerpc/sysdev/
Dmicropatch.c636 int i; in cpm_load_patch() local
644 for (i=0; i<(sizeof(patch_2000)/4); i++) in cpm_load_patch()
645 *dp++ = patch_2000[i]; in cpm_load_patch()
648 for (i=0; i<(sizeof(patch_2f00)/4); i++) in cpm_load_patch()
649 *dp++ = patch_2f00[i]; in cpm_load_patch()
662 for (i=0; i<(sizeof(patch_2000)/4); i++) in cpm_load_patch()
663 *dp++ = patch_2000[i]; in cpm_load_patch()
666 for (i=0; i<(sizeof(patch_2f00)/4); i++) in cpm_load_patch()
667 *dp++ = patch_2f00[i]; in cpm_load_patch()
675 i = (RPBASE + sizeof(iic_t) + 31) & ~31; in cpm_load_patch()
[all …]
/arch/powerpc/net/
Dbpf_jit.h30 #define IMM_H(i) ((uintptr_t)(i)>>16) argument
31 #define IMM_HA(i) (((uintptr_t)(i)>>16) + \ argument
32 (((uintptr_t)(i) & 0x8000) >> 15))
33 #define IMM_L(i) ((uintptr_t)(i) & 0xffff) argument
45 #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \ argument
46 ___PPC_RA(a) | IMM_L(i))
48 #define PPC_LI(r, i) PPC_ADDI(r, 0, i) argument
49 #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ argument
50 ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
51 #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i) argument
[all …]
/arch/mips/ar7/
Dprom.c43 int i; in prom_getenv() local
45 for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++) in prom_getenv()
46 if (!strcmp(name, adam2_env[i].name)) in prom_getenv()
47 return adam2_env[i].value; in prom_getenv()
55 int i; in ar7_init_cmdline() local
57 for (i = 1; i < argc; i++) { in ar7_init_cmdline()
58 strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE); in ar7_init_cmdline()
59 if (i < (argc - 1)) in ar7_init_cmdline()
131 int i; in lookup_psp_var_map() local
133 for (i = 0; i < ARRAY_SIZE(psp_var_map); i++) in lookup_psp_var_map()
[all …]
/arch/xtensa/kernel/
Dhw_breakpoint.c146 size_t i; in alloc_slot() local
148 for (i = 0; i < n; ++i) { in alloc_slot()
149 if (!slot[i]) { in alloc_slot()
150 slot[i] = bp; in alloc_slot()
151 return i; in alloc_slot()
183 int i; in arch_install_hw_breakpoint() local
187 i = alloc_slot(this_cpu_ptr(bp_on_reg), XCHAL_NUM_IBREAK, bp); in arch_install_hw_breakpoint()
188 if (i < 0) in arch_install_hw_breakpoint()
189 return i; in arch_install_hw_breakpoint()
190 set_ibreak_regs(i, bp); in arch_install_hw_breakpoint()
[all …]
/arch/avr32/include/asm/
Datomic.h20 #define ATOMIC_INIT(i) { (i) } argument
23 #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) argument
26 static inline int __atomic_##op##_return(int i, atomic_t *v) \
38 : "m" (v->counter), #asm_con (i) \
45 static inline int __atomic_fetch_##op(int i, atomic_t *v) \
58 : "m" (v->counter), #asm_con (i) \
71 static inline void atomic_##op(int i, atomic_t *v) \ in ATOMIC_OP_RETURN()
73 (void)__atomic_##op##_return(i, v); \ in ATOMIC_OP_RETURN()
76 static inline int atomic_fetch_##op(int i, atomic_t *v) \
78 return __atomic_fetch_##op(i, v); \
[all …]
/arch/mips/sgi-ip22/
Dip22-int.c247 int i; in arch_init_irq() local
250 for (i = 0; i < 256; i++) { in arch_init_irq()
251 if (i & 0x80) { in arch_init_irq()
252 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7; in arch_init_irq()
253 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7; in arch_init_irq()
254 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7; in arch_init_irq()
255 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7; in arch_init_irq()
256 } else if (i & 0x40) { in arch_init_irq()
257 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6; in arch_init_irq()
258 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6; in arch_init_irq()
[all …]
/arch/mips/kernel/
Drtlx-cmp.c24 int i; in rtlx_interrupt() local
34 for (i = 0; i < RTLX_CHANNELS; i++) { in rtlx_interrupt()
35 wake_up(&channel_wqs[i].lx_queue); in rtlx_interrupt()
36 wake_up(&channel_wqs[i].rt_queue); in rtlx_interrupt()
50 int i, err; in rtlx_module_init() local
71 for (i = 0; i < RTLX_CHANNELS; i++) { in rtlx_module_init()
72 init_waitqueue_head(&channel_wqs[i].rt_queue); in rtlx_module_init()
73 init_waitqueue_head(&channel_wqs[i].lx_queue); in rtlx_module_init()
74 atomic_set(&channel_wqs[i].in_open, 0); in rtlx_module_init()
75 mutex_init(&channel_wqs[i].mutex); in rtlx_module_init()
[all …]
/arch/ia64/include/asm/
Datomic.h21 #define ATOMIC_INIT(i) { (i) } argument
22 #define ATOMIC64_INIT(i) { (i) } argument
27 #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
28 #define atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
32 ia64_atomic_##op (int i, atomic_t *v) \
40 new = old c_op i; \
47 ia64_atomic_fetch_##op (int i, atomic_t *v) \
55 new = old c_op i; \
67 #define atomic_add_return(i,v) \ argument
69 int __ia64_aar_i = (i); \
[all …]
/arch/x86/mm/kmemcheck/
Dshadow.c104 unsigned int i; in kmemcheck_mark_unallocated_pages() local
106 for (i = 0; i < n; ++i) in kmemcheck_mark_unallocated_pages()
107 kmemcheck_mark_unallocated(page_address(&p[i]), PAGE_SIZE); in kmemcheck_mark_unallocated_pages()
112 unsigned int i; in kmemcheck_mark_uninitialized_pages() local
114 for (i = 0; i < n; ++i) in kmemcheck_mark_uninitialized_pages()
115 kmemcheck_mark_uninitialized(page_address(&p[i]), PAGE_SIZE); in kmemcheck_mark_uninitialized_pages()
120 unsigned int i; in kmemcheck_mark_initialized_pages() local
122 for (i = 0; i < n; ++i) in kmemcheck_mark_initialized_pages()
123 kmemcheck_mark_initialized(page_address(&p[i]), PAGE_SIZE); in kmemcheck_mark_initialized_pages()
130 unsigned int i; in kmemcheck_shadow_test() local
[all …]
/arch/sh/kernel/cpu/sh4a/
Dubc.c49 int i; in sh4a_ubc_enable_all() local
51 for (i = 0; i < sh4a_ubc.num_events; i++) in sh4a_ubc_enable_all()
52 if (mask & (1 << i)) in sh4a_ubc_enable_all()
53 __raw_writel(__raw_readl(UBC_CBR(i)) | UBC_CBR_CE, in sh4a_ubc_enable_all()
54 UBC_CBR(i)); in sh4a_ubc_enable_all()
59 int i; in sh4a_ubc_disable_all() local
61 for (i = 0; i < sh4a_ubc.num_events; i++) in sh4a_ubc_disable_all()
62 __raw_writel(__raw_readl(UBC_CBR(i)) & ~UBC_CBR_CE, in sh4a_ubc_disable_all()
63 UBC_CBR(i)); in sh4a_ubc_disable_all()
69 int i; in sh4a_ubc_active_mask() local
[all …]
/arch/mips/math-emu/
Dieee754d.c36 int i; in ieee754dp_dump() local
46 for (i = DP_FBITS - 1; i >= 0; i--) in ieee754dp_dump()
47 printk("%c", DPMANT(x) & DP_MBIT(i) ? '1' : '0'); in ieee754dp_dump()
57 for (i = DP_FBITS - 1; i >= 0; i--) in ieee754dp_dump()
58 printk("%c", DPMANT(x) & DP_MBIT(i) ? '1' : '0'); in ieee754dp_dump()
63 for (i = DP_FBITS - 1; i >= 0; i--) in ieee754dp_dump()
64 printk("%c", DPMANT(x) & DP_MBIT(i) ? '1' : '0'); in ieee754dp_dump()
76 int i; in ieee754sp_dump() local
85 for (i = SP_FBITS - 1; i >= 0; i--) in ieee754sp_dump()
86 printk("%c", SPMANT(x) & SP_MBIT(i) ? '1' : '0'); in ieee754sp_dump()
[all …]
/arch/m68k/coldfire/
Dvectors.c44 int i; in trap_init() local
52 for (i = 3; (i <= 23); i++) in trap_init()
53 _ramvec[i] = trap; in trap_init()
54 for (i = 33; (i <= 63); i++) in trap_init()
55 _ramvec[i] = trap; in trap_init()
56 for (i = 24; (i <= 31); i++) in trap_init()
57 _ramvec[i] = inthandler; in trap_init()
58 for (i = 64; (i < 255); i++) in trap_init()
59 _ramvec[i] = inthandler; in trap_init()
/arch/x86/kernel/cpu/mtrr/
Dcleanup.c71 int i; in x86_get_mtrr_mem_range() local
73 for (i = 0; i < num_var_ranges; i++) { in x86_get_mtrr_mem_range()
74 type = range_state[i].type; in x86_get_mtrr_mem_range()
77 base = range_state[i].base_pfn; in x86_get_mtrr_mem_range()
78 size = range_state[i].size_pfn; in x86_get_mtrr_mem_range()
84 for (i = 0; i < nr_range; i++) in x86_get_mtrr_mem_range()
86 range[i].start, range[i].end); in x86_get_mtrr_mem_range()
90 for (i = 0; i < num_var_ranges; i++) { in x86_get_mtrr_mem_range()
91 type = range_state[i].type; in x86_get_mtrr_mem_range()
95 size = range_state[i].size_pfn; in x86_get_mtrr_mem_range()
[all …]

12345678910>>...85