| /arch/m68k/hp300/ |
| D | time.c | 42 in_8(CLOCKBASE + CLKSR); in hp300_tick()
55 msb1 = in_8(CLOCKBASE + 5); in hp300_gettimeoffset()
56 lsb = in_8(CLOCKBASE + 7); in hp300_gettimeoffset()
57 msb2 = in_8(CLOCKBASE + 5); in hp300_gettimeoffset()
60 lsb = in_8(CLOCKBASE + 7); in hp300_gettimeoffset()
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| D | config.c | 119 #define rtc_busy() (in_8(RTCBASE + RTC_CMD) & RTC_BUSY)
120 #define rtc_data_available() (in_8(RTCBASE + RTC_CMD) & RTC_DATA_RDY)
121 #define rtc_status() (in_8(RTCBASE + RTC_CMD))
123 #define rtc_read_data() (in_8(RTCBASE + RTC_DATA))
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| /arch/powerpc/platforms/powermac/ |
| D | udbg_scc.c | 30 while ((in_8(sccc) & SCC_TXRDY) == 0) in udbg_scc_putc()
41 if ((in_8(sccc) & SCC_RXRDY) != 0) in udbg_scc_getc_poll()
42 return in_8(sccd); in udbg_scc_getc_poll()
52 while ((in_8(sccc) & SCC_RXRDY) == 0) in udbg_scc_getc()
54 return in_8(sccd); in udbg_scc_getc()
123 x = in_8(sccc); in udbg_scc_init()
132 scc_inittab[1] = in_8(sccc); in udbg_scc_init()
134 scc_inittab[3] = in_8(sccc); in udbg_scc_init()
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| D | nvram.c | 152 return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]); in direct_nvram_read_byte()
168 val = in_8(&nvram_data[(addr & 0x1f) << 4]); in indirect_nvram_read_byte()
297 stat = in_8(base); in sm_erase_bank()
330 stat = in_8(base); in sm_write_bank()
376 stat = in_8(base) ^ in_8(base); in amd_erase_bank()
418 stat = in_8(base) ^ in_8(base); in amd_write_bank()
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| D | time.c | 290 while ((in_8(&via[IFR]) & T1_INT) == 0) in via_calibrate_decr()
294 in_8(&via[T1CL]); in via_calibrate_decr()
295 while ((in_8(&via[IFR]) & T1_INT) == 0) in via_calibrate_decr()
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| /arch/powerpc/platforms/embedded6xx/ |
| D | ls_uart.c | 36 char lsr = in_8(avr_addr + UART_LSR); in wd_stop()
46 while (in_8(avr_addr + UART_LSR) & UART_LSR_DR) in wd_stop()
47 printk("%c", in_8(avr_addr + UART_RX)); in wd_stop()
104 (void) in_8(avr_addr + UART_LSR); in ls_uart_init()
105 (void) in_8(avr_addr + UART_RX); in ls_uart_init()
106 (void) in_8(avr_addr + UART_IIR); in ls_uart_init()
107 (void) in_8(avr_addr + UART_MSR); in ls_uart_init()
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| /arch/powerpc/boot/ |
| D | ns16550.c | 40 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0); in ns16550_putc()
46 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0); in ns16550_getc()
47 return in_8(reg_base); in ns16550_getc()
52 return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0); in ns16550_tstc()
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| D | mpc52xx-psc.c | 49 return in_8(psc + MPC52xx_PSC_BUFFER); in psc_getc()
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| D | cuboot-52xx.c | 50 div = in_8(reg + 0x204) & 0x0020 ? 8 : 4; in platform_fixups()
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| D | ebony.c | 53 fpga_reg0 = in_8(fpga); in ebony_flashsel_fixup()
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| D | treeboot-walnut.c | 38 fpga_brds1 = in_8(fpga); in walnut_flashsel_fixup()
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| D | io.h | 11 static inline int in_8(const volatile unsigned char *addr) in in_8() function
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| /arch/powerpc/platforms/512x/ |
| D | mpc5121_ads_cpld.c | 68 in_8(pic_mask) | irq_to_pic_bit(cpld_irq)); in cpld_mask_irq()
78 in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq)); in cpld_unmask_irq()
93 u8 status = in_8(statusp); in cpld_pic_get_irq()
94 u8 mask = in_8(maskp); in cpld_pic_get_irq()
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| /arch/powerpc/platforms/82xx/ |
| D | ep8248e.c | 72 in_8(&ep8248e_bcsr[8]); in ep8248e_set_mdc()
83 in_8(&ep8248e_bcsr[8]); in ep8248e_set_mdio_dir()
94 in_8(&ep8248e_bcsr[8]); in ep8248e_set_mdio_data()
99 return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA; in ep8248e_get_mdio_data()
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| D | pq2.c | 32 in_8(&cpm2_immr->im_clkrst.res[0]); in pq2_restart()
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| /arch/powerpc/platforms/52xx/ |
| D | mpc52xx_pm.c | 41 out_8(&gpiow->wkup_gpioe, in_8(&gpiow->wkup_gpioe) | (1 << pin)); in mpc52xx_set_wakeup_gpio()
43 out_8(&gpiow->wkup_ddr, in_8(&gpiow->wkup_ddr) & ~(1 << pin)); in mpc52xx_set_wakeup_gpio()
45 out_8(&gpiow->wkup_inten, in_8(&gpiow->wkup_inten) | (1 << pin)); in mpc52xx_set_wakeup_gpio()
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| /arch/powerpc/sysdev/ |
| D | simple_gpio.c | 44 return !!(in_8(mm_gc->regs) & u8_pin2mask(gpio)); in u8_gpio_get()
81 u8_gc->data = in_8(mm_gc->regs); in u8_gpio_save_regs()
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| /arch/m68k/include/asm/ |
| D | raw_io.h | 32 #define in_8(addr) \ macro
49 #define raw_inb in_8
52 #define __raw_readb in_8
119 *buf++ = in_8(port); in raw_insb()
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| D | io_mm.h | 128 #define readb(addr) in_8(addr)
245 #define isa_inb(port) in_8(isa_itb(port))
252 #define isa_readb(p) in_8(isa_mtb((unsigned long)(p)))
389 #define inb(port) ((port) < 1024 ? isa_rom_inb(port) : in_8(port))
390 #define inb_p(port) ((port) < 1024 ? isa_rom_inb_p(port) : in_8(port))
410 #define readb(addr) in_8(addr)
444 #define readb(addr) in_8(addr)
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| D | q40_master.h | 42 #define master_inb(_reg_) in_8((unsigned char *)q40_master_addr+_reg_)
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| D | ide.h | 47 #define readb in_8
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| /arch/powerpc/platforms/85xx/ |
| D | mpc85xx_cds.c | 345 cds_pci_slot = ((in_8(&cadmus->cm_csr) >> 6) & 0x3) + 1; in mpc85xx_cds_setup_arch()
347 in_8(&cadmus->cm_ver), cds_pci_slot); in mpc85xx_cds_setup_arch()
369 in_8(&cadmus->cm_ver)); in mpc85xx_cds_show_cpuinfo()
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| D | ksi8560.c | 158 in_8(cpld_base + KSI8560_CPLD_HVR)); in ksi8560_show_cpuinfo()
160 in_8(cpld_base + KSI8560_CPLD_PVR)); in ksi8560_show_cpuinfo()
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| /arch/powerpc/platforms/83xx/ |
| D | mpc834x_mds.c | 65 bcsr5 = in_8(bcsr_regs + 5); in mpc834xemds_usb_cfg()
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| /arch/powerpc/platforms/40x/ |
| D | ep405.c | 93 in_8(bcsr_regs + BCSR_XIRQ_SELECT); in ep405_init_bcsr()
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