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Searched refs:in_le32 (Results 1 – 25 of 37) sorted by relevance

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/arch/powerpc/platforms/embedded6xx/
Dc2k.c75 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0); in c2k_reset_board()
79 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); in c2k_reset_board()
83 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); in c2k_reset_board()
87 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2); in c2k_reset_board()
91 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); in c2k_reset_board()
95 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); in c2k_reset_board()
/arch/powerpc/sysdev/
Dgrackle.c35 val = in_le32(bp->cfg_data); in grackle_set_stg()
40 (void)in_le32(bp->cfg_data); in grackle_set_stg()
48 val = in_le32(bp->cfg_data); in grackle_set_loop_snoop()
53 (void)in_le32(bp->cfg_data); in grackle_set_loop_snoop()
Dmv64x60_pic.c89 (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO); in mv64x60_mask_low()
102 (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO); in mv64x60_unmask_low()
126 (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI); in mv64x60_mask_high()
139 (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI); in mv64x60_unmask_high()
163 (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK); in mv64x60_mask_gpp()
178 (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE); in mv64x60_mask_ack_gpp()
191 (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK); in mv64x60_unmask_gpp()
277 cause = in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_SELECT_CAUSE); in mv64x60_get_irq()
282 cause = in_le32(mv64x60_gpp_reg_base + in mv64x60_get_irq()
Dmv64x60_udbg.c37 while(in_le32(mpsc_base + MPSC_0_CR2_OFFSET) & MPSC_CHR_2_TCS) in mv64x60_udbg_putc()
45 return (in_le32(mpsc_intr_cause) & MPSC_INTR_CAUSE_RCC) != 0; in mv64x60_udbg_testc()
Dindirect_pci.c74 *val = in_le32(cfg_data); in __indirect_read_config()
Dfsl_pci.c768 cfg_bar = in_le32(pcie->cfg_type0 + PEX_OUTWIN0_BAR); in mpc83xx_pcie_setup()
903 if (!(in_le32(&in[i].ar) & PEX_RCIWARn_EN)) in fsl_pci_immrbar_base()
906 if (get_immrbase() == in_le32(&in[i].tar)) in fsl_pci_immrbar_base()
907 return (u64)in_le32(&in[i].barh) << 32 | in fsl_pci_immrbar_base()
908 in_le32(&in[i].barl); in fsl_pci_immrbar_base()
/arch/powerpc/boot/
Dcuboot-c2k.c57 enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)); in c2k_bridge_setup()
142 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0)); in c2k_reset()
146 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); in c2k_reset()
150 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); in c2k_reset()
154 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2)); in c2k_reset()
158 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); in c2k_reset()
162 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); in c2k_reset()
Dmpsc.c53 chr1 = in_le32((u32 *)(mpsc_base + MPSC_CHR_1)) & 0x00ff0000; in mpsc_open()
54 chr2 = in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & ~(MPSC_CHR_2_TA in mpsc_open()
66 while (in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & MPSC_CHR_2_TCS); in mpsc_putc()
78 cause = in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE)); in mpsc_getc()
90 return (u8)((in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE)) in mpsc_tstc()
99 while ((in_le32((u32 *)(sdma_base + SDMA_SDCM)) in mpsc_stop_dma()
Dmv64x60.c185 return in_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].data)); in mv64x60_cfg_read()
293 enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)) & 0xf; in mv64x60_config_ctlr_windows()
299 base = in_le32((u32 *)(bridge_base + mv64x60_cpu2mem[i].lo)) in mv64x60_config_ctlr_windows()
302 size = in_le32((u32 *)(bridge_base + mv64x60_cpu2mem[i].size)) in mv64x60_config_ctlr_windows()
431 i = in_le32((u32 *)(bridge_base + offset)); in mv64x60_config_pci_windows()
519 enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)) & 0xf; in mv64x60_get_mem_size()
523 v = in_le32((u32*)(bridge_base in mv64x60_get_mem_size()
Dmv64x60_i2c.c67 status = in_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_STATUS)) in mv64x60_i2c_wait_for_status()
86 return in_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_DATA)) & 0xff; in mv64x60_i2c_read_byte()
Dio.h57 static inline unsigned in_le32(const volatile unsigned *addr) in in_le32() function
Dcuboot-pq2.c215 if (!(in_le32(&pci_regs[0][32]) & 1)) { in fixup_pci()
227 out_le32(&pci_regs[0][65], in_le32(&pci_regs[0][65]) | 6); in fixup_pci()
/arch/powerpc/platforms/powermac/
Dpic.c96 } while((in_le32(&pmac_irq_hw[i]->enable) & bit) in pmac_mask_and_ack_irq()
112 (void)in_le32(&pmac_irq_hw[i]->ack); in pmac_ack_irq()
131 } while((in_le32(&pmac_irq_hw[i]->enable) & bit) in __pmac_set_irq_mask()
139 if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level)) in __pmac_set_irq_mask()
214 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; in gatwick_action()
215 bits |= in_le32(&pmac_irq_hw[i]->level); in gatwick_action()
244 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; in pmac_pic_get_irq()
245 bits |= in_le32(&pmac_irq_hw[i]->level); in pmac_pic_get_irq()
626 (void)in_le32(&pmac_irq_hw[0]->event); in pmacpic_suspend()
629 (void)in_le32(&pmac_irq_hw[0]->enable); in pmacpic_suspend()
Dpci.c159 } while (in_le32(hose->cfg_addr) != caddr); in macrisc_cfg_map_bus()
331 *val = swap ? in_le32(addr) : in_be32(addr); in u3_ht_read_config()
421 } while (in_le32(hose->cfg_addr) != caddr); in u4_pcie_cfg_map_bus()
463 vendev = in_le32(bp->cfg_data); in init_bandit()
482 magic = in_le32(bp->cfg_data); in init_bandit()
/arch/powerpc/include/asm/
Ddbdma.h97 while(in_le32(&((regs)->status)) & (ACTIVE|FLUSH)) \
103 while(in_le32(&((regs)->status)) & (RUN)) \
/arch/powerpc/platforms/maple/
Dpci.c114 } while (in_le32(hose->cfg_addr) != caddr); in u3_agp_cfg_access()
145 *val = in_le32(addr); in u3_agp_read_config()
289 *val = in_le32(addr); in u3_ht_read_config()
368 } while (in_le32(hose->cfg_addr) != caddr); in u4_pcie_cfg_access()
400 *val = in_le32(addr); in u4_pcie_read_config()
/arch/powerpc/platforms/pasemi/
Dpci.c90 tmp = in_le32(addr); in workaround_5945()
141 *val = in_le32(addr); in pa_pxp_read_config()
Diommu.c236 regword = in_le32(iob+IOB_AD_REG); in iob_init()
242 regword = in_le32(iob+IOBCOM_REG); in iob_init()
Ddma_lib.c58 return in_le32(iob_regs+reg); in pasemi_read_iob_reg()
78 return in_le32(mac_regs[intf]+reg); in pasemi_read_mac_reg()
98 return in_le32(dma_regs+reg); in pasemi_read_dma_reg()
/arch/powerpc/platforms/chrp/
Dpci.c54 *val = in_le32(cfg_data); in gg2_read_config()
148 in_le32(&Hydra->Feature_Control)); in hydra_init()
157 printk(", now %x\n", in_le32(&Hydra->Feature_Control)); in hydra_init()
Dsetup.c112 sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL) in chrp_show_cpuinfo()
115 t = in_le32(gg2_pci_config_base+ in chrp_show_cpuinfo()
147 t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL); in chrp_show_cpuinfo()
/arch/microblaze/include/asm/
Dio.h63 #define in_le32(a) __le32_to_cpu(__raw_readl(a)) macro
/arch/powerpc/platforms/512x/
Dmpc512x_shared.c261 pix_fmt = in_le32(vaddr); in mpc512x_init_diu()
263 diu_shared_fb.fb_phys = in_le32(vaddr + 4); in mpc512x_init_diu()
/arch/powerpc/platforms/52xx/
Dmpc52xx_pci.c147 value = in_le32(hose->cfg_data); in mpc52xx_pci_read_config()
207 value = in_le32(hose->cfg_data); in mpc52xx_pci_write_config()
/arch/microblaze/pci/
Dindirect_pci.c70 *val = in_le32(cfg_data); in indirect_read_config()

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