/arch/alpha/math-emu/ |
D | qrnnd.S | 43 #define n1 $17 macro 53 addq n1,n1,n1 54 bis n1,tmp,n1 56 cmpule d,n1,qb 57 subq n1,d,tmp 58 cmovne qb,tmp,n1 61 addq n1,n1,n1 62 bis n1,tmp,n1 64 cmpule d,n1,qb 65 subq n1,d,tmp [all …]
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D | sfp-util.h | 20 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 22 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
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/arch/powerpc/math-emu/ |
D | udivmodti4.c | 10 _FP_W_TYPE n1, _FP_W_TYPE n0, in _fp_udivmodti4() argument 19 if (d0 > n1) in _fp_udivmodti4() 23 udiv_qrnnd (q0, n0, n1, n0, d0); in _fp_udivmodti4() 35 udiv_qrnnd (q1, n1, 0, n1, d0); in _fp_udivmodti4() 36 udiv_qrnnd (q0, n0, n1, n0, d0); in _fp_udivmodti4() 46 if (d0 > n1) in _fp_udivmodti4() 58 n1 = (n1 << bm) | (n0 >> (_FP_W_TYPE_SIZE - bm)); in _fp_udivmodti4() 62 udiv_qrnnd (q0, n0, n1, n0, d0); in _fp_udivmodti4() 85 n1 -= d0; in _fp_udivmodti4() 97 n2 = n1 >> b; in _fp_udivmodti4() [all …]
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/arch/s390/include/asm/ |
D | cmpxchg.h | 35 #define __cmpxchg_double(p1, p2, o1, o2, n1, n2) \ argument 39 register __typeof__(*(p1)) __new1 asm("4") = (n1); \ 53 #define cmpxchg_double(p1, p2, o1, o2, n1, n2) \ argument 60 __cmpxchg_double(__p1, __p2, o1, o2, n1, n2); \
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D | percpu.h | 166 #define arch_this_cpu_cmpxchg_double(pcp1, pcp2, o1, o2, n1, n2) \ argument 168 typeof(pcp1) o1__ = (o1), n1__ = (n1); \
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/arch/x86/include/asm/ |
D | cmpxchg.h | 165 #define __cmpxchg_double(pfx, p1, p2, o1, o2, n1, n2) \ argument 168 __typeof__(*(p1)) __old1 = (o1), __new1 = (n1); \ 182 #define cmpxchg_double(p1, p2, o1, o2, n1, n2) \ argument 183 __cmpxchg_double(LOCK_PREFIX, p1, p2, o1, o2, n1, n2) 185 #define cmpxchg_double_local(p1, p2, o1, o2, n1, n2) \ argument 186 __cmpxchg_double(, p1, p2, o1, o2, n1, n2)
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D | percpu.h | 447 #define percpu_cmpxchg8b_double(pcp1, pcp2, o1, o2, n1, n2) \ argument 450 typeof(pcp1) __o1 = (o1), __n1 = (n1); \ 491 #define percpu_cmpxchg16b_double(pcp1, pcp2, o1, o2, n1, n2) \ argument 494 typeof(pcp1) __o1 = (o1), __n1 = (n1); \
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/arch/mips/bcm63xx/ |
D | cpu.c | 164 unsigned int tmp, n1, n2, m1; in detect_cpu_clock() local 168 n1 = (tmp & MIPSPLLCTL_N1_MASK) >> MIPSPLLCTL_N1_SHIFT; in detect_cpu_clock() 171 n1 += 1; in detect_cpu_clock() 174 return (16 * 1000000 * n1 * n2) / m1; in detect_cpu_clock() 179 unsigned int tmp, n1, n2, m1; in detect_cpu_clock() local 183 n1 = (tmp & DMIPSPLLCFG_N1_MASK) >> DMIPSPLLCFG_N1_SHIFT; in detect_cpu_clock() 186 return (16 * 1000000 * n1 * n2) / m1; in detect_cpu_clock()
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/arch/mips/ralink/ |
D | rt288x.c | 87 u32 n1; in prom_soc_init() local 91 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); in prom_soc_init() 94 if (n0 == RT2880_CHIP_NAME0 && n1 == RT2880_CHIP_NAME1) { in prom_soc_init() 98 panic("rt288x: unknown SoC, n0:%08x n1:%08x", n0, n1); in prom_soc_init()
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D | rt305x.c | 216 u32 n1; in prom_soc_init() local 220 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); in prom_soc_init() 222 if (n0 == RT3052_CHIP_NAME0 && n1 == RT3052_CHIP_NAME1) { in prom_soc_init() 235 } else if (n0 == RT3350_CHIP_NAME0 && n1 == RT3350_CHIP_NAME1) { in prom_soc_init() 239 } else if (n0 == RT3352_CHIP_NAME0 && n1 == RT3352_CHIP_NAME1) { in prom_soc_init() 243 } else if (n0 == RT5350_CHIP_NAME0 && n1 == RT5350_CHIP_NAME1) { in prom_soc_init() 248 panic("rt305x: unknown SoC, n0:%08x n1:%08x", n0, n1); in prom_soc_init()
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D | rt3883.c | 122 u32 n1; in prom_soc_init() local 126 n1 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID4_7); in prom_soc_init() 129 if (n0 == RT3883_CHIP_NAME0 && n1 == RT3883_CHIP_NAME1) { in prom_soc_init() 133 panic("rt3883: unknown SoC, n0:%08x n1:%08x", n0, n1); in prom_soc_init()
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D | mt7621.c | 172 u32 n1; in prom_soc_init() local 176 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); in prom_soc_init() 178 if (n0 == MT7621_CHIP_NAME0 && n1 == MT7621_CHIP_NAME1) { in prom_soc_init() 182 panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", n0, n1); in prom_soc_init()
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D | mt7620.c | 640 u32 n1; in prom_soc_init() local 648 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); in prom_soc_init() 652 if (n0 == MT7620_CHIP_NAME0 && n1 == MT7620_CHIP_NAME1) { in prom_soc_init() 662 } else if (n0 == MT7620_CHIP_NAME0 && n1 == MT7628_CHIP_NAME1) { in prom_soc_init() 674 panic("mt762x: unknown SoC, n0:%08x n1:%08x\n", n0, n1); in prom_soc_init()
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/arch/sparc/math-emu/ |
D | sfp-util_64.h | 75 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 81 __r1 = (n1) % __d1; \ 82 __q1 = (n1) / __d1; \
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D | sfp-util_32.h | 76 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 104 "1" ((USItype)(n1)), \
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/arch/sh/math-emu/ |
D | sfp-util.h | 31 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 38 __r1 = (n1) % __d1; \ 39 __q1 = (n1) / __d1; \
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/arch/arm64/include/asm/ |
D | cmpxchg.h | 179 #define cmpxchg_double(ptr1, ptr2, o1, o2, n1, n2) \ argument 184 (unsigned long)(n1), (unsigned long)(n2), \ 189 #define cmpxchg_double_local(ptr1, ptr2, o1, o2, n1, n2) \ argument 194 (unsigned long)(n1), (unsigned long)(n2), \ 214 #define this_cpu_cmpxchg_double_8(ptr1, ptr2, o1, o2, n1, n2) \ argument 220 o1, o2, n1, n2); \
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/arch/powerpc/platforms/ps3/ |
D | repository.c | 53 static void _dump_node_name(unsigned int lpar_id, u64 n1, u64 n2, u64 n3, in _dump_node_name() argument 57 _dump_field("n1: ", n1, func, line); in _dump_node_name() 65 static void _dump_node(unsigned int lpar_id, u64 n1, u64 n2, u64 n3, u64 n4, in _dump_node() argument 69 _dump_field("n1: ", n1, func, line); in _dump_node() 121 static int read_node(unsigned int lpar_id, u64 n1, u64 n2, u64 n3, u64 n4, in read_node() argument 134 result = lv1_read_repository_node(lpar_id, n1, n2, n3, n4, &v1, in read_node() 140 dump_node_name(lpar_id, n1, n2, n3, n4); in read_node() 144 dump_node(lpar_id, n1, n2, n3, n4, v1, v2); in read_node() 1073 static int create_node(u64 n1, u64 n2, u64 n3, u64 n4, u64 v1, u64 v2) in create_node() argument 1077 dump_node(0, n1, n2, n3, n4, v1, v2); in create_node() [all …]
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/arch/powerpc/include/asm/ |
D | sfp-machine.h | 315 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 321 __r1 = (n1) % __d1; \ 322 __q1 = (n1) / __d1; \
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/arch/mips/include/asm/mach-bcm63xx/ |
D | bcm63xx_regs.h | 401 #define ADSLPLLCTL_VAL(n1, n2, m1ref, m2ref, m1cpu, m1bus, m2bus) \ argument 402 (((n1) << ADSLPLLCTL_N1_SHIFT) | \
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