| /arch/mips/mm/ |
| D | page.c | 105 pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off) in pg_addiu() argument
108 if (off > 0x7fff) { in pg_addiu()
109 uasm_i_lui(buf, T9, uasm_rel_hi(off)); in pg_addiu()
110 uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off)); in pg_addiu()
112 uasm_i_addiu(buf, T9, ZERO, off); in pg_addiu()
115 if (off > 0x7fff) { in pg_addiu()
116 uasm_i_lui(buf, T9, uasm_rel_hi(off)); in pg_addiu()
117 uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off)); in pg_addiu()
120 UASM_i_ADDIU(buf, reg1, reg2, off); in pg_addiu()
233 static void build_clear_store(u32 **buf, int off) in build_clear_store() argument
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| /arch/ia64/kernel/ |
| D | entry.h | 27 #define PT_REGS_SAVES(off) \ argument
29 .fframe IA64_PT_REGS_SIZE+16+(off); \
30 .spillsp rp, PT(CR_IIP)+16+(off); \
31 .spillsp ar.pfs, PT(CR_IFS)+16+(off); \
32 .spillsp ar.unat, PT(AR_UNAT)+16+(off); \
33 .spillsp ar.fpsr, PT(AR_FPSR)+16+(off); \
34 .spillsp pr, PT(PR)+16+(off);
36 #define PT_REGS_UNWIND_INFO(off) \ argument
38 PT_REGS_SAVES(off); \
41 #define SWITCH_STACK_SAVES(off) \ argument
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| /arch/powerpc/boot/ |
| D | addnote.c | 68 #define GET_16BE(off) ((buf[off] << 8) + (buf[(off)+1])) argument
69 #define GET_32BE(off) ((GET_16BE(off) << 16U) + GET_16BE((off)+2U)) argument
70 #define GET_64BE(off) ((((unsigned long long)GET_32BE(off)) << 32ULL) + \ argument
71 ((unsigned long long)GET_32BE((off)+4ULL)))
72 #define PUT_16BE(off, v)(buf[off] = ((v) >> 8) & 0xff, \ argument
73 buf[(off) + 1] = (v) & 0xff)
74 #define PUT_32BE(off, v)(PUT_16BE((off), (v) >> 16L), PUT_16BE((off) + 2, (v))) argument
75 #define PUT_64BE(off, v)((PUT_32BE((off), (v) >> 32L), \ argument
76 PUT_32BE((off) + 4, (v))))
78 #define GET_16LE(off) ((buf[off]) + (buf[(off)+1] << 8)) argument
[all …]
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| /arch/arm/plat-samsung/include/plat/ |
| D | gpio-cfg-helpers.h | 28 unsigned int off, unsigned int config) in samsung_gpio_do_setcfg() argument
30 return (chip->config->set_config)(chip, off, config); in samsung_gpio_do_setcfg()
34 unsigned int off) in samsung_gpio_do_getcfg() argument
36 return (chip->config->get_config)(chip, off); in samsung_gpio_do_getcfg()
40 unsigned int off, samsung_gpio_pull_t pull) in samsung_gpio_do_setpull() argument
42 return (chip->config->set_pull)(chip, off, pull); in samsung_gpio_do_setpull()
46 unsigned int off) in samsung_gpio_do_getpull() argument
48 return chip->config->get_pull(chip, off); in samsung_gpio_do_getpull()
69 unsigned int off, samsung_gpio_pull_t pull);
81 unsigned int off, samsung_gpio_pull_t pull);
[all …]
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| /arch/mips/include/asm/ |
| D | mips-cpc.h | 65 #define BUILD_CPC_R_(name, off) \ argument
68 return (u32 *)(mips_cpc_base + (off)); \
73 return __raw_readl(mips_cpc_base + (off)); \
76 #define BUILD_CPC__W(name, off) \ argument
79 __raw_writel(value, mips_cpc_base + (off)); \
82 #define BUILD_CPC_RW(name, off) \ argument
83 BUILD_CPC_R_(name, off) \
84 BUILD_CPC__W(name, off)
86 #define BUILD_CPC_Cx_R_(name, off) \ argument
87 BUILD_CPC_R_(cl_##name, MIPS_CPC_CLCB_OFS + (off)) \
[all …]
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| D | uasm.h | 210 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off) argument
211 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off) argument
216 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off) argument
222 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off) argument
226 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off) argument
227 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off) argument
232 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off) argument
238 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off) argument
241 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off) argument
242 #define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off) argument
[all …]
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| D | mips-cm.h | 116 #define BUILD_CM_R_(name, off) \ argument
119 return (unsigned long __iomem *)(mips_cm_base + (off)); \
150 #define BUILD_CM__W(name, off) \ argument
169 #define BUILD_CM_RW(name, off) \ argument
170 BUILD_CM_R_(name, off) \
171 BUILD_CM__W(name, off)
173 #define BUILD_CM_Cx_R_(name, off) \ argument
174 BUILD_CM_R_(cl_##name, MIPS_CM_CLCB_OFS + (off)) \
175 BUILD_CM_R_(co_##name, MIPS_CM_COCB_OFS + (off))
177 #define BUILD_CM_Cx__W(name, off) \ argument
[all …]
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| /arch/sparc/kernel/ |
| D | jump_label.c | 20 s32 off = (s32)entry->target - (s32)entry->code; in arch_jump_label_transform() local
23 BUG_ON(off & 3); in arch_jump_label_transform()
26 if (off <= 0xfffff && off >= -0x100000) in arch_jump_label_transform()
32 val = 0x10680000 | (((u32) off >> 2) & 0x7ffff); in arch_jump_label_transform()
35 BUG_ON(off > 0x7fffff); in arch_jump_label_transform()
36 BUG_ON(off < -0x800000); in arch_jump_label_transform()
38 val = 0x10800000 | (((u32) off >> 2) & 0x3fffff); in arch_jump_label_transform()
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| /arch/powerpc/platforms/powernv/ |
| D | opal-nvram.c | 33 int off; in opal_nvram_read() local
37 off = *index; in opal_nvram_read()
38 if ((off + count) > nvram_size) in opal_nvram_read()
39 count = nvram_size - off; in opal_nvram_read()
40 rc = opal_read_nvram(__pa(buf), count, off); in opal_nvram_read()
50 int off; in opal_nvram_write() local
54 off = *index; in opal_nvram_write()
55 if ((off + count) > nvram_size) in opal_nvram_write()
56 count = nvram_size - off; in opal_nvram_write()
59 rc = opal_write_nvram(__pa(buf), count, off); in opal_nvram_write()
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| /arch/arm/include/asm/ |
| D | percpu.h | 24 static inline void set_my_cpu_offset(unsigned long off) in set_my_cpu_offset() argument
27 asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory"); in set_my_cpu_offset()
32 unsigned long off; in __my_cpu_offset() local
39 asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) in __my_cpu_offset()
42 return off; in __my_cpu_offset()
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| /arch/arm/mach-ebsa110/ |
| D | io.c | 350 u32 off; in outsb() local
353 off = port << 2; in outsb()
355 off = (port & ~1) << 1; in outsb()
360 __raw_writesb((void __iomem *)ISAIO_BASE + off, from, len); in outsb()
365 u32 off; in insb() local
368 off = port << 2; in insb()
370 off = (port & ~1) << 1; in insb()
375 __raw_readsb((void __iomem *)ISAIO_BASE + off, from, len); in insb()
383 u32 off; in outsw() local
386 off = port << 2; in outsw()
[all …]
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| /arch/mips/alchemy/common/ |
| D | gpiolib.c | 120 static int alchemy_gpic_get(struct gpio_chip *chip, unsigned int off) in alchemy_gpic_get() argument
122 return !!au1300_gpio_get_value(off + AU1300_GPIO_BASE); in alchemy_gpic_get()
125 static void alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v) in alchemy_gpic_set() argument
127 au1300_gpio_set_value(off + AU1300_GPIO_BASE, v); in alchemy_gpic_set()
130 static int alchemy_gpic_dir_input(struct gpio_chip *chip, unsigned int off) in alchemy_gpic_dir_input() argument
132 return au1300_gpio_direction_input(off + AU1300_GPIO_BASE); in alchemy_gpic_dir_input()
135 static int alchemy_gpic_dir_output(struct gpio_chip *chip, unsigned int off, in alchemy_gpic_dir_output() argument
138 return au1300_gpio_direction_output(off + AU1300_GPIO_BASE, v); in alchemy_gpic_dir_output()
141 static int alchemy_gpic_gpio_to_irq(struct gpio_chip *chip, unsigned int off) in alchemy_gpic_gpio_to_irq() argument
143 return au1300_gpio_to_irq(off + AU1300_GPIO_BASE); in alchemy_gpic_gpio_to_irq()
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| /arch/unicore32/mm/ |
| D | proc-macros.S | 97 .macro va2pa, va, pa, tbl, msk, off, err=990f
99 mov \off, \va >> #22 @ off <- index of 1st page table
103 ldw \pa, [\pa+], \off << #2 @ pa <- the content of pt
106 and \off, \pa, #3 @ off <- the last 2 bits
107 add \tbl, \tbl, \off << #3 @ cmove table pointer
112 mov \off, \va << #10
114 mov \off, \off >> \tbl
115 mov \off, \off >> #2 @ off <- index of 2nd pt
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| /arch/arm/include/asm/hardware/ |
| D | iomd.h | 23 #define iomd_readb(off) __raw_readb(IOMD_BASE + (off)) argument
24 #define iomd_readl(off) __raw_readl(IOMD_BASE + (off)) argument
25 #define iomd_writeb(val,off) __raw_writeb(val, IOMD_BASE + (off)) argument
26 #define iomd_writel(val,off) __raw_writel(val, IOMD_BASE + (off)) argument
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| D | ioc.h | 22 #define ioc_readb(off) __raw_readb(IOC_BASE + (off)) argument
23 #define ioc_writeb(val,off) __raw_writeb(val, IOC_BASE + (off)) argument
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| /arch/mips/bcm47xx/ |
| D | prom.c | 59 unsigned long off; in prom_init_mem() local
76 off = CPHYSADDR((unsigned long)prom_init); in prom_init_mem()
83 if (off + mem >= max) { in prom_init_mem()
139 unsigned long off = (unsigned long)prom_init; in bcm47xx_prom_highmem_init() local
163 off = EXTVBASE + __pa(off); in bcm47xx_prom_highmem_init()
165 if (!memcmp(prom_init, (void *)(off + extmem), 16)) in bcm47xx_prom_highmem_init()
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| /arch/m32r/kernel/ |
| D | ptrace.c | 71 static int ptrace_read_user(struct task_struct *tsk, unsigned long off, in ptrace_read_user() argument
79 if ((off & 3) || off > sizeof(struct user) - 3) in ptrace_read_user()
82 off >>= 2; in ptrace_read_user()
83 switch (off) { in ptrace_read_user()
107 off = PT_BBPC; in ptrace_read_user()
110 if (off < (sizeof(struct pt_regs) >> 2)) in ptrace_read_user()
111 tmp = get_stack_long(tsk, off); in ptrace_read_user()
113 else if (off >= (long)(&dummy->fpu >> 2) && in ptrace_read_user()
114 off < (long)(&dummy->u_fpvalid >> 2)) { in ptrace_read_user()
116 if (off == (long)(&dummy->fpu.fpscr >> 2)) in ptrace_read_user()
[all …]
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| /arch/arm/boot/dts/ |
| D | omap3430-sdp.dts | 67 gpmc,cs-rd-off-ns = <186>;
68 gpmc,cs-wr-off-ns = <186>;
70 gpmc,adv-rd-off-ns = <48>;
71 gpmc,adv-wr-off-ns = <48>;
73 gpmc,oe-off-ns = <168>;
75 gpmc,we-off-ns = <168>;
117 gpmc,cs-rd-off-ns = <36>;
118 gpmc,cs-wr-off-ns = <36>;
120 gpmc,adv-rd-off-ns = <24>;
121 gpmc,adv-wr-off-ns = <36>;
[all …]
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| D | bcm4708-smartrg-sr400ac.dts | 39 linux,default-trigger = "default-off";
45 linux,default-trigger = "default-off";
51 linux,default-trigger = "default-off";
57 linux,default-trigger = "default-off";
63 linux,default-trigger = "default-off";
69 linux,default-trigger = "default-off";
75 linux,default-trigger = "default-off";
81 linux,default-trigger = "default-off";
87 linux,default-trigger = "default-off";
93 linux,default-trigger = "default-off";
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| D | bcm4709-netgear-r8000.dts | 39 linux,default-trigger = "default-off";
45 linux,default-trigger = "default-off";
51 linux,default-trigger = "default-off";
57 linux,default-trigger = "default-off";
63 linux,default-trigger = "default-off";
69 linux,default-trigger = "default-off";
75 linux,default-trigger = "default-off";
81 linux,default-trigger = "default-off";
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| D | omap-gpmc-smsc911x.dtsi | 30 gpmc,cs-rd-off-ns = <150>;
31 gpmc,cs-wr-off-ns = <150>;
33 gpmc,adv-rd-off-ns = <15>;
34 gpmc,adv-wr-off-ns = <40>;
36 gpmc,oe-off-ns = <140>;
38 gpmc,we-off-ns = <140>;
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| /arch/sh/kernel/cpu/ |
| D | adc.c | 14 int off; in adc_single() local
19 off = (channel & 0x03) << 2; in adc_single()
32 return (((__raw_readb(ADDRAH + off) << 8) | in adc_single()
33 __raw_readb(ADDRAL + off)) >> 6); in adc_single()
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| /arch/arc/boot/dts/ |
| D | abilis_tb100_dvk.dts | 79 default-state = "off";
84 default-state = "off";
89 default-state = "off";
94 default-state = "off";
99 default-state = "off";
104 default-state = "off";
109 default-state = "off";
114 default-state = "off";
119 default-state = "off";
124 default-state = "off";
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| D | abilis_tb101_dvk.dts | 79 default-state = "off";
84 default-state = "off";
89 default-state = "off";
94 default-state = "off";
99 default-state = "off";
104 default-state = "off";
109 default-state = "off";
114 default-state = "off";
119 default-state = "off";
124 default-state = "off";
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| /arch/unicore32/kernel/ |
| D | ptrace.c | 63 static int ptrace_read_user(struct task_struct *tsk, unsigned long off, in ptrace_read_user() argument
69 if (off < sizeof(struct pt_regs)) in ptrace_read_user()
70 tmp = get_user_reg(tsk, off >> 2); in ptrace_read_user()
78 static int ptrace_write_user(struct task_struct *tsk, unsigned long off, in ptrace_write_user() argument
81 if (off >= sizeof(struct pt_regs)) in ptrace_write_user()
84 return put_user_reg(tsk, off >> 2, val); in ptrace_write_user()
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