| /arch/sparc/kernel/ |
| D | pmc.c | 36 #define pmc_readb(offs) (sbus_readb(regs+offs)) argument
37 #define pmc_writeb(val, offs) (sbus_writeb(val, regs+offs)) argument
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| D | apc.c | 37 #define apc_readb(offs) (sbus_readb(regs+offs)) argument
38 #define apc_writeb(val, offs) (sbus_writeb(val, regs+offs)) argument
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| /arch/arm/plat-samsung/include/plat/ |
| D | gpio-cfg.h | 56 samsung_gpio_pull_t (*get_pull)(struct samsung_gpio_chip *chip, unsigned offs);
57 int (*set_pull)(struct samsung_gpio_chip *chip, unsigned offs,
60 unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs);
61 int (*set_config)(struct samsung_gpio_chip *chip, unsigned offs,
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| /arch/arm/mach-s3c64xx/ |
| D | common.c | 284 int offs = eint_offset(data->irq); in s3c_irq_eint_set_type() local
291 if (offs > 27) in s3c_irq_eint_set_type()
294 if (offs <= 15) in s3c_irq_eint_set_type()
329 if (offs <= 15) in s3c_irq_eint_set_type()
330 shift = (offs / 2) * 4; in s3c_irq_eint_set_type()
332 shift = ((offs - 16) / 2) * 4; in s3c_irq_eint_set_type()
342 if (offs < 16) { in s3c_irq_eint_set_type()
343 pin = S3C64XX_GPN(offs); in s3c_irq_eint_set_type()
345 } else if (offs < 23) { in s3c_irq_eint_set_type()
346 pin = S3C64XX_GPL(offs + 8 - 16); in s3c_irq_eint_set_type()
[all …]
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| /arch/s390/mm/ |
| D | maccess.c | 141 int offs = 0, size, rc; in copy_to_user_real() local
148 while (offs < count) { in copy_to_user_real()
149 size = min(PAGE_SIZE, count - offs); in copy_to_user_real()
150 if (memcpy_real(buf, src + offs, size)) in copy_to_user_real()
152 if (copy_to_user(dest + offs, buf, size)) in copy_to_user_real()
154 offs += size; in copy_to_user_real()
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| /arch/powerpc/kernel/ |
| D | kvm_emul.S | 30 #define LL64(reg, offs, reg2) ld reg, (offs)(reg2) argument
31 #define STL64(reg, offs, reg2) std reg, (offs)(reg2) argument
33 #define LL64(reg, offs, reg2) lwz reg, (offs + 4)(reg2) argument
34 #define STL64(reg, offs, reg2) stw reg, (offs + 4)(reg2) argument
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| /arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/ |
| D | iop_version_defs_asm.h | 42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
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| D | iop_sap_in_defs_asm.h | 42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
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| /arch/cris/include/arch-v32/arch/hwregs/iop/asm/ |
| D | iop_version_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_scrc_out_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_scrc_in_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_crc_par_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_fifo_out_extra_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_fifo_in_extra_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_trigger_grp_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_mpu_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | iop_sap_in_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| /arch/cris/include/arch-v32/arch/hwregs/asm/ |
| D | irq_nmi_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | strcop_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | strmux_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | cris_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | config_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| D | rt_trace_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| /arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/ |
| D | config_defs_asm.h | 45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
53 ((inst) + offs + (index) * stride)
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| /arch/cris/include/arch-v32/mach-a3/mach/hwregs/asm/ |
| D | clkgen_defs_asm.h | 42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs) argument
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ argument
50 ((inst) + offs + (index) * stride)
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