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/arch/powerpc/include/asm/
Dcmpxchg.h20 unsigned long prev; in __xchg_u32_local() local
27 : "=&r" (prev), "+m" (*(volatile unsigned int *)p) in __xchg_u32_local()
31 return prev; in __xchg_u32_local()
37 unsigned long prev; in __xchg_u32_relaxed() local
44 : "=&r" (prev), "+m" (*p) in __xchg_u32_relaxed()
48 return prev; in __xchg_u32_relaxed()
55 unsigned long prev; in __xchg_u64_local() local
62 : "=&r" (prev), "+m" (*(volatile unsigned long *)p) in __xchg_u64_local()
66 return prev; in __xchg_u64_local()
72 unsigned long prev; in __xchg_u64_relaxed() local
[all …]
Dmmu_context.h43 extern void radix__switch_mmu_context(struct mm_struct *prev,
45 static inline void switch_mmu_context(struct mm_struct *prev, in switch_mmu_context() argument
50 return radix__switch_mmu_context(prev, next); in switch_mmu_context()
58 extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next,
73 static inline void switch_mm_irqs_off(struct mm_struct *prev, in switch_mm_irqs_off() argument
109 if (prev == next) in switch_mm_irqs_off()
114 if (prev->context.acop || next->context.acop) in switch_mm_irqs_off()
129 switch_mmu_context(prev, next, tsk); in switch_mm_irqs_off()
132 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, in switch_mm() argument
138 switch_mm_irqs_off(prev, next, tsk); in switch_mm()
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/arch/mips/include/asm/
Dswitch_to.h32 extern asmlinkage struct task_struct *resume(struct task_struct *prev,
52 #define __mips_mt_fpaff_switch_to(prev) \ argument
54 struct thread_info *__prev_ti = task_thread_info(prev); \
58 (!(KSTK_STATUS(prev) & ST0_CU1))) { \
60 prev->cpus_allowed = prev->thread.user_cpus_allowed; \
66 #define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0) argument
100 #define switch_to(prev, next, last) \ argument
102 __mips_mt_fpaff_switch_to(prev); \
103 lose_fpu_inatomic(1, prev); \
107 __save_dsp(prev); \
[all …]
/arch/mn10300/include/asm/
Dswitch_to.h22 #define switch_fpu(prev, next) \ argument
24 if ((prev)->thread.fpu_flags & THREAD_HAS_FPU) { \
25 (prev)->thread.fpu_flags &= ~THREAD_HAS_FPU; \
26 (prev)->thread.uregs->epsw &= ~EPSW_FE; \
27 fpu_save(&(prev)->thread.fpu_state); \
31 #define switch_fpu(prev, next) do {} while (0) argument
36 struct task_struct *__switch_to(struct thread_struct *prev,
40 #define switch_to(prev, next, last) \ argument
42 switch_fpu(prev, next); \
44 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
/arch/ia64/include/asm/
Dswitch_to.h44 #define __switch_to(prev,next,last) do { \ argument
45 if (IA64_HAS_EXTRA_STATE(prev)) \
46 ia64_save_extra(prev); \
60 # define switch_to(prev,next,last) do { \ argument
61 if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) { \
62 ia64_psr(task_pt_regs(prev))->mfh = 0; \
63 (prev)->thread.flags |= IA64_THREAD_FPH_VALID; \
64 __ia64_save_fpu((prev)->thread.fph); \
66 __switch_to(prev, next, last); \
76 # define switch_to(prev,next,last) __switch_to(prev, next, last) argument
/arch/avr32/include/asm/
Dswitch_to.h18 #define ocd_switch(prev, next) \ argument
20 ocd_write(PID, prev->pid); \
24 #define ocd_switch(prev, next) argument
41 #define switch_to(prev, next, last) \ argument
43 ocd_switch(prev, next); \
44 last = __switch_to(prev, &prev->thread.cpu_context + 1, \
/arch/metag/include/asm/
Dmmu_context.h72 static inline void switch_mmu(struct mm_struct *prev, struct mm_struct *next) in switch_mmu() argument
81 if (prev->context.pgd_base != (unsigned long) prev->pgd) { in switch_mmu()
83 ((pgd_t *) prev->context.pgd_base)[i] = prev->pgd[i]; in switch_mmu()
85 prev->pgd = (pgd_t *)mmu_get_base(); in switch_mmu()
87 next->pgd = prev->pgd; in switch_mmu()
88 prev->pgd = (pgd_t *) prev->context.pgd_base; in switch_mmu()
98 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, in switch_mm() argument
101 if (prev != next) in switch_mm()
102 switch_mmu(prev, next); in switch_mm()
/arch/um/os-Linux/
Dirq.c82 struct irq_fd **prev; in os_free_irq_by_cb() local
85 prev = &active_fds; in os_free_irq_by_cb()
86 while (*prev != NULL) { in os_free_irq_by_cb()
87 if ((*test)(*prev, arg)) { in os_free_irq_by_cb()
88 struct irq_fd *old_fd = *prev; in os_free_irq_by_cb()
90 (pollfds[i].fd != (*prev)->fd)) { in os_free_irq_by_cb()
94 (*prev)->fd, pollfds[i].fd); in os_free_irq_by_cb()
107 *last_irq_ptr2 = prev; in os_free_irq_by_cb()
109 *prev = (*prev)->next; in os_free_irq_by_cb()
115 prev = &(*prev)->next; in os_free_irq_by_cb()
/arch/blackfin/include/asm/
Dswitch_to.h21 asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
24 #define switch_to(prev,next,last) \ argument
26 memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
30 (last) = resume (prev, next); \
33 #define switch_to(prev, next, last) \ argument
35 (last) = resume(prev, next); \
/arch/alpha/include/asm/
Dxchg.h139 unsigned long prev, tmp, cmp, addr64; in ____cmpxchg() local
157 : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64) in ____cmpxchg()
160 return prev; in ____cmpxchg()
166 unsigned long prev, tmp, cmp, addr64; in ____cmpxchg() local
184 : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64) in ____cmpxchg()
187 return prev; in ____cmpxchg()
193 unsigned long prev, cmp; in ____cmpxchg() local
207 : "=&r"(prev), "=&r"(cmp), "=m"(*m) in ____cmpxchg()
210 return prev; in ____cmpxchg()
216 unsigned long prev, cmp; in ____cmpxchg() local
[all …]
/arch/s390/include/asm/
Dswitch_to.h31 #define switch_to(prev,next,last) do { \ argument
37 save_access_regs(&prev->thread.acrs[0]); \
38 save_ri_cb(prev->thread.ri_cb); \
41 restore_ri_cb(next->thread.ri_cb, prev->thread.ri_cb); \
42 prev = __switch_to(prev,next); \
/arch/frv/include/asm/
Dswitch_to.h25 struct task_struct *prev);
27 #define switch_to(prev, next, last) \ argument
29 (prev)->thread.sched_lr = \
31 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
Dmmu_context.h35 #define switch_mm(prev, next, tsk) \ argument
37 if (prev != next) \
38 change_mm_context(&prev->context, &next->context, next->pgd); \
41 #define activate_mm(prev, next) \ argument
43 change_mm_context(&prev->context, &next->context, next->pgd); \
/arch/x86/include/asm/
Dswitch_to.h6 struct task_struct *__switch_to_asm(struct task_struct *prev,
9 __visible struct task_struct *__switch_to(struct task_struct *prev,
16 static inline void prepare_switch_to(struct task_struct *prev, in prepare_switch_to() argument
60 #define switch_to(prev, next, last) \ argument
62 prepare_switch_to(prev, next); \
64 ((last) = __switch_to_asm((prev), (next))); \
Dcmpxchg_32.h27 u64 prev = *ptr; in set_64bit() local
32 : "=m" (*ptr), "+A" (prev) in set_64bit()
48 u64 prev; in __cmpxchg64() local
50 : "=A" (prev), in __cmpxchg64()
56 return prev; in __cmpxchg64()
61 u64 prev; in __cmpxchg64_local() local
63 : "=A" (prev), in __cmpxchg64_local()
69 return prev; in __cmpxchg64_local()
/arch/sh/include/asm/
Dswitch_to_32.h63 struct task_struct *__switch_to(struct task_struct *prev,
69 #define switch_to(prev, next, last) \ argument
79 if (is_dsp_enabled(prev)) \
80 __save_dsp(prev); \
84 __ts1 = (u32 *)&prev->thread.sp; \
85 __ts2 = (u32 *)&prev->thread.pc; \
86 __ts4 = (u32 *)prev; \
Dfutex-irq.h10 u32 prev = 0; in atomic_futex_op_cmpxchg_inatomic() local
14 ret = get_user(prev, uaddr); in atomic_futex_op_cmpxchg_inatomic()
15 if (!ret && oldval == prev) in atomic_futex_op_cmpxchg_inatomic()
20 *uval = prev; in atomic_futex_op_cmpxchg_inatomic()
/arch/tile/include/asm/
Dswitch_to.h40 #define switch_to(prev, next, last) ((last) = _switch_to((prev), (next))) argument
41 extern struct task_struct *_switch_to(struct task_struct *prev,
45 extern struct task_struct *__switch_to(struct task_struct *prev,
73 struct task_struct *sim_notify_fork(struct task_struct *prev);
/arch/parisc/lib/
Dbitops.c61 u64 prev; in __cmpxchg_u64() local
64 if ((prev = *ptr) == old) in __cmpxchg_u64()
67 return prev; in __cmpxchg_u64()
73 unsigned int prev; in __cmpxchg_u32() local
76 if ((prev = *ptr) == old) in __cmpxchg_u32()
79 return (unsigned long)prev; in __cmpxchg_u32()
/arch/parisc/include/asm/
Dmmu_context.h52 static inline void switch_mm_irqs_off(struct mm_struct *prev, in switch_mm_irqs_off() argument
55 if (prev != next) { in switch_mm_irqs_off()
61 static inline void switch_mm(struct mm_struct *prev, in switch_mm() argument
67 switch_mm_irqs_off(prev, next, tsk); in switch_mm()
74 static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) in activate_mm() argument
89 switch_mm(prev,next,current); in activate_mm()
/arch/powerpc/platforms/cell/spufs/
Dswitch.c1791 static int quiece_spu(struct spu_state *prev, struct spu *spu) in quiece_spu() argument
1803 if (check_spu_isolate(prev, spu)) { /* Step 2. */ in quiece_spu()
1806 disable_interrupts(prev, spu); /* Step 3. */ in quiece_spu()
1807 set_watchdog_timer(prev, spu); /* Step 4. */ in quiece_spu()
1808 inhibit_user_access(prev, spu); /* Step 5. */ in quiece_spu()
1809 if (check_spu_isolate(prev, spu)) { /* Step 6. */ in quiece_spu()
1812 set_switch_pending(prev, spu); /* Step 7. */ in quiece_spu()
1813 save_mfc_cntl(prev, spu); /* Step 8. */ in quiece_spu()
1814 save_spu_runcntl(prev, spu); /* Step 9. */ in quiece_spu()
1815 save_mfc_sr1(prev, spu); /* Step 10. */ in quiece_spu()
[all …]
/arch/m32r/include/asm/
Dswitch_to.h28 #define switch_to(prev, next, last) do { \ argument
44 : "0" (prev), \
45 "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
46 "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
/arch/hexagon/include/asm/
Dmmu_context.h66 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, in switch_mm() argument
75 if (next->context.generation < prev->context.generation) { in switch_mm()
79 next->context.generation = prev->context.generation; in switch_mm()
88 static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) in activate_mm() argument
93 switch_mm(prev, next, current_thread_info()->task); in activate_mm()
/arch/c6x/include/asm/
Dswitch_to.h20 asmlinkage void *__switch_to(struct thread_struct *prev,
24 #define switch_to(prev, next, last) \ argument
27 (last) = __switch_to(&(prev)->thread, \
28 &(next)->thread, (prev)); \
/arch/arc/include/asm/
Dcmpxchg.h22 unsigned long prev; in __cmpxchg() local
36 : "=&r"(prev) /* Early clobber, to prevent reg reuse */ in __cmpxchg()
44 return prev; in __cmpxchg()
53 int prev; in __cmpxchg() local
60 prev = *p; in __cmpxchg()
61 if (prev == expected) in __cmpxchg()
64 return prev; in __cmpxchg()

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