| /arch/sh/lib64/ |
| D | udivsi3.S | 13 shlld r22,r0,r25
14 shlri r25,48,r25
16 sub r20,r25,r21
20 mmulfx.w r25,r19,r19
36 mmacnfx.wl r25,r19,r21
38 sub r4,r20,r25
40 mulu.l r25,r21,r19
47 sub.l r25,r20,r25
49 mulu.l r25,r21,r19
50 addz.l r25,r63,r25
[all …]
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| D | sdivsi3.S | 17 shlld r5, r1, r25 /* normalize; [-2 ..1, 1..2) in s2.62 */
18 shari r25, 58, r21 /* extract 5(6) bit index (s2.4 with hole -1..1) */
21 shari r25, 32, r25 /* normalize to s2.30 */
23 muls.l r25, r19, r19 /* s2.38 */
31 muls.l r25, r21, r18 /* s2.58 */
36 muls.l r18, r25, r0 /* s2.60 */
37 muls.l r18, r4, r25 /* s32.30 */
41 shari r25, 63, r0
46 add r21, r25, r21
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| D | udivdi3.S | 70 shlrd r2,r9,r25
71 shlri r25,32,r8
86 sub r25,r5,r25
89 shlri r25,22,r21
97 sub r25,r5,r25
98 bgtu/u r7,r25,tr0 // no_lo_adj
100 sub r25,r7,r25
102 mextr4 r2,r25,r2
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| /arch/parisc/kernel/ |
| D | pacache.S | 448 1: ldd 0(%r25), %r19
449 ldd 8(%r25), %r20
451 ldd 16(%r25), %r21
452 ldd 24(%r25), %r22
456 ldd 32(%r25), %r19
457 ldd 40(%r25), %r20
461 ldd 48(%r25), %r21
462 ldd 56(%r25), %r22
466 ldd 64(%r25), %r19
467 ldd 72(%r25), %r20
[all …]
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| D | entry.S | 811 LDREG TASK_PT_KPC(%r25), %r2
814 LDREG TASK_PT_KSP(%r25), %r30
815 LDREG TASK_THREAD_INFO(%r25), %r25
817 mtctl %r25,%cr30
921 copy %r0, %r25 /* long in_syscall = 0 */
1114 ldo PT_FR0(%r29), %r25
1115 save_fp %r25
1119 copy %r29, %r25 /* arg1 is pt_regs */
1125 copy %r25, %r16 /* save pt_regs */
1157 ptp = r25 /* page directory/page table pointer */
[all …]
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| D | syscall.S | 127 depdi 0, 31, 32, %r25
186 STREG %r25, TASK_PT_GR25(%r1) /* 2nd argument */
250 comib,<> 0,%r25,.Lin_syscall
341 LDREG TASK_PT_GR25(%r1), %r25
394 comib,<> 0,%r25,.Ltrace_in_syscall
558 depdi 0, 31, 32, %r25
633 sub,<> %r28, %r25, %r0
696 depdi 0, 31, 32, %r25
711 4: ldb 0(%r25), %r25
721 6: ldh 0(%r25), %r25
[all …]
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| D | sys_parisc32.c | 18 asmlinkage long sys32_unimplemented(int r26, int r25, int r24, int r23, in sys32_unimplemented() argument
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| /arch/tile/lib/ |
| D | atomic_asm_32.S | 101 seq r27, r23, r25
115 sw r28, r25
142 moveli r25, 32 /* starting backoff time in cycles */
148 slt r22, r22, r25
152 shli r25, r25, 1 /* double the backoff; retry the tns */
156 slt r26, r23, r25 /* is the proposed backoff too big? */
160 mvnz r25, r26, r23
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| /arch/parisc/include/asm/ |
| D | unistd.h | 72 #define K_LOAD_ARGS_2(r26,r25) \ argument
73 register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
75 #define K_LOAD_ARGS_3(r26,r25,r24) \ argument
77 K_LOAD_ARGS_2(r26,r25)
78 #define K_LOAD_ARGS_4(r26,r25,r24,r23) \ argument
80 K_LOAD_ARGS_3(r26,r25,r24)
81 #define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \ argument
83 K_LOAD_ARGS_4(r26,r25,r24,r23)
84 #define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \ argument
86 K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
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| /arch/arc/include/asm/ |
| D | entry.h | 90 ld r25, [sp, 12]
144 ; Retrieve orig r25 and save it with rest of callee_regs
148 PUSH r25
167 PUSH r25
179 POP r25
195 POP r25
263 mov r25, \tsk
278 mov r25, \tsk
292 add \reg, r25, \off
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| D | entry-arcv2.h | 17 ; Now manually save: r12, sp, fp, gp, r25
40 PUSH r25 ; user_r25 variable
41 GET_CURR_TASK_ON_CPU r25
60 POP r25
117 ; Now do what ISR prologue does (manually save r12, sp, fp, gp, r25)
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| D | entry-compact.h | 171 PUSH r25
172 GET_CURR_TASK_ON_CPU r25
245 PUSH r25
246 GET_CURR_TASK_ON_CPU r25
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| D | unwind.h | 42 unsigned long r25; member
101 PTREGS_INFO(r25), \
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| /arch/hexagon/kernel/ |
| D | head.S | 49 r25 = pc; define
52 r25 = and(r2,r25); /* R25 holds PHYS_OFFSET now */ define
56 r24 = add(r24,r25); /* + PHYS_OFFSET */
91 r1 = r25;
113 r1 = r25;
155 r2 = r25; /* phys_offset */
218 memw(r0) = r25;
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| /arch/ia64/kernel/ |
| D | head.S | 212 mov r25=pr;;
278 SAL_TO_OS_BOOT_HANDOFF_STATE_SAVE(r16,r17,r25)
1085 tpa r25=in0
1107 RESTORE_REGION_REGS(r25, r17,r18,r19);;
1108 RESTORE_REG(b0, r25, r17);;
1109 RESTORE_REG(b1, r25, r17);;
1110 RESTORE_REG(b2, r25, r17);;
1111 RESTORE_REG(b3, r25, r17);;
1112 RESTORE_REG(b4, r25, r17);;
1113 RESTORE_REG(b5, r25, r17);;
[all …]
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| D | ivt.S | 116 MOV_FROM_ITIR(r25)
127 extr.u r26=r25,2,6
132 (p8) dep r25=r18,r25,2,6
193 MOV_TO_ITIR(p8, r25, r24) // change to default page-size for VHPT
203 ITC_D(p7, r24, r25)
225 ld8 r25=[r21] // read *pte again
239 (p7) cmp.ne.or.andcm p6,p7=r25,r18 // did *pte change
392 THASH(p8, r17, r16, r25)
394 MOV_TO_IHA(p8, r17, r25)
400 mov r25=PERCPU_PAGE_SHIFT << 2
[all …]
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| D | minstate.h | 51 mov r25=ar.unat; /* M */ \
113 st8 [r16]=r25,16; /* save ar.unat */ \
182 .mem.offset 8,0; st8.spill [r3]=r25,16; \
205 adds r25=PT(B7)-PT(F11),r3; \
208 st8 [r25]=r19,16; /* b7 */ \
211 st8 [r25]=r10; /* ar.ssd */ \
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| /arch/tile/kernel/ |
| D | intvec_32.S | 426 push_reg r25, r52
675 seq r25, r26, r27
681 bzt r25, \not_single_stepping
709 seq r25, r26, r27
716 bzt r25, \not_single_stepping
723 addi r25, r26, 16
736 slte_u r25, r27, r25
744 bzt r25, \not_single_stepping
1041 { move r24, zero; move r25, zero }
1087 pop_reg r25
[all …]
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| /arch/powerpc/kernel/ |
| D | head_64.S | 139 mr r25,r4
167 mr r4,r25
323 mr r25,r4
335 mr r4,r25
569 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
570 sldi r25,r25,32
580 add r25,r25,r26
581 1: mr r3,r25
932 clrldi r0,r25,2
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| D | fsl_booke_entry_mapping.S | 98 or r25,r8,r9
99 ori r8,r25,(MAS3_SX|MAS3_SW|MAS3_SR)
182 rlwinm r7,r25,0,0x03ffffff
213 mr r6, r25
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| /arch/microblaze/lib/ |
| D | uaccess_old.S | 114 8: lwi r25, r6, 0x001C + offset; \
122 16: swi r25, r5, 0x001C + offset; \
202 swi r25, r1, 36
225 lwi r25, r1, 36
245 lwi r25, r1, 36
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| /arch/score/lib/ |
| D | checksum.S | 61 cmpi.c r25, 0x1
63 andri.c r25,r4 , 0x1 /*Is src 2 bytes aligned?*/
120 cmpi.c r25, 0x0
137 ldi r25, 0
143 andri.c r25, src, 0x1 /* odd buffer? */
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| /arch/parisc/lib/ |
| D | lusercopy.S | 76 comib,=,n 0,%r25,$lclu_done
79 addib,<> -1,%r25,$lclu_loop
84 copy %r25,%r28
90 ldo 1(%r25),%r25
109 comib,= 0,%r25,$lslen_nzero
115 addib,<> -1,%r25,$lslen_loop
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| /arch/alpha/include/uapi/asm/ |
| D | ptrace.h | 35 unsigned long r25; member
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| /arch/arc/include/uapi/asm/ |
| D | ptrace.h | 44 unsigned long r25, r24, r23, r22, r21, r20; member
|