| /arch/powerpc/sysdev/ |
| D | 6xx-suspend.S | 22 mfspr r5, SPRN_HID0
23 rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
24 oris r5, r5, HID0_SLEEP@h
25 mtspr SPRN_HID0, r5
28 lis r5, ret_from_standby@h
29 ori r5, r5, ret_from_standby@l
30 mtlr r5
32 CURRENT_THREAD_INFO(r5, r1)
33 lwz r6, TI_LOCAL_FLAGS(r5)
35 stw r6, TI_LOCAL_FLAGS(r5)
[all …]
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| /arch/arm/lib/ |
| D | csumpartialcopygeneric.S | 114 1: load4l r4, r5, r6, r7
115 stmia dst!, {r4, r5, r6, r7}
117 adcs sum, sum, r5
128 load2l r4, r5
129 stmia dst!, {r4, r5}
131 adcs sum, sum, r5
143 mov r5, r4, get_byte_0
146 strb r5, [dst], #1
147 mov r5, r4, get_byte_1
148 strb r5, [dst], #1
[all …]
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| /arch/s390/kernel/vdso32/ |
| D | clock_gettime.S | 23 basr %r5,0
24 0: al %r5,21f-0b(%r5) /* get &_vdso_data */
35 1: l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */
40 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
41 sl %r1,__VDSO_XTIME_STAMP+4(%r5)
44 2: ms %r0,__VDSO_TK_MULT(%r5) /* * tk->mult */
46 l %r0,__VDSO_TK_MULT(%r5)
50 a %r0,__VDSO_TK_MULT(%r5)
52 al %r0,__VDSO_WTOM_NSEC(%r5)
53 al %r1,__VDSO_WTOM_NSEC+4(%r5)
[all …]
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| D | gettimeofday.S | 23 basr %r5,0
24 0: al %r5,13f-0b(%r5) /* get &_vdso_data */
27 mvc 0(8,%r3),__VDSO_TIMEZONE(%r5)
30 l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */
35 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
36 sl %r1,__VDSO_XTIME_STAMP+4(%r5)
39 3: ms %r0,__VDSO_TK_MULT(%r5) /* * tk->mult */
41 l %r0,__VDSO_TK_MULT(%r5)
45 a %r0,__VDSO_TK_MULT(%r5)
47 al %r0,__VDSO_XTIME_NSEC(%r5) /* + xtime */
[all …]
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| /arch/s390/kernel/vdso64/ |
| D | clock_gettime.S | 23 larl %r5,_vdso_data
36 0: lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */
40 lgf %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
41 lg %r0,__VDSO_WTOM_SEC(%r5)
43 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
44 msgf %r1,__VDSO_TK_MULT(%r5) /* * tk->mult */
45 alg %r1,__VDSO_WTOM_NSEC(%r5)
47 clg %r4,__VDSO_UPD_COUNT(%r5) /* check update counter */
49 larl %r5,13f
50 1: clg %r1,0(%r5)
[all …]
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| D | gettimeofday.S | 23 larl %r5,_vdso_data
26 mvc 0(8,%r3),__VDSO_TIMEZONE(%r5)
29 lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */
34 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
35 msgf %r1,__VDSO_TK_MULT(%r5) /* * tk->mult */
36 alg %r1,__VDSO_XTIME_NSEC(%r5) /* + tk->xtime_nsec */
37 lg %r0,__VDSO_XTIME_SEC(%r5) /* tk->xtime_sec */
38 clg %r4,__VDSO_UPD_COUNT(%r5) /* check update counter */
40 lgf %r5,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
41 srlg %r1,%r1,0(%r5) /* >> tk->shift */
[all …]
|
| /arch/sh/lib/ |
| D | udivsi3_i4i-Os.S | 50 extu.w r5,r0
51 cmp/eq r5,r0
56 mov.l r5,@-r15
57 shll16 r5
59 div1 r5,r4
61 div1 r5,r4
62 div1 r5,r4
64 div1 r5,r4
69 div1 r5,r4
71 div1 r5,r4
[all …]
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| D | udivsi3.S | 37 div1 r5,r4
39 div1 r5,r4; div1 r5,r4; div1 r5,r4
40 div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
43 div1 r5,r4; rotcl r0
44 div1 r5,r4; rotcl r0
45 div1 r5,r4; rotcl r0
46 rts; div1 r5,r4
50 extu.w r5,r0
51 cmp/eq r5,r0
57 shll16 r5
[all …]
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| D | udivsi3_i4i.S | 67 cmp/hi r1,r5
68 extu.w r5,r1
70 cmp/eq r5,r1
73 mov r5,r1
74 shll16 r5
76 div1 r5,r0
78 div1 r5,r0
79 div1 r5,r0
81 div1 r5,r0
86 mov.b @(r0,r5),r1
[all …]
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| D | memset-sh4.S | 28 mov.b r5,@-r4
30 extu.b r5,r5
31 swap.b r5,r0 ! V0
32 or r0,r5 ! VV
33 swap.w r5,r0 ! VV00
34 or r0,r5 ! VVVV
54 10: mov.l r5,@-r4
65 mov r5, r0
68 mov.l r5,@(4, r4)
69 mov.l r5,@(8, r4)
[all …]
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| D | movmem.S | 52 mov.l @(48,r5),r0
55 mov.l @(60,r5),r0
59 mov.l @(56,r5),r0
63 mov.l @(52,r5),r0
64 add #64,r5
76 mov.l @(52,r5),r0
85 mov.l @(60,r5),r0
91 mov.l @(56,r5),r0
97 mov.l @(52,r5),r0
103 mov.l @(48,r5),r0
[all …]
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| /arch/powerpc/boot/ |
| D | util.S | 62 mflr r5
65 mtlr r5
66 lis r5,0b@ha
67 addi r5,r5,0b@l
68 subf r5,r5,r6 /* In case we're relocated */
69 addis r5,r5,timebase_period_ns@ha
70 lwz r5,timebase_period_ns@l(r5)
71 add r4,r4,r5
73 divw r4,r4,r5 /* BUS ticks */
75 1: mftbu r5
[all …]
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| D | string.S | 17 addi r5,r3,-1
21 stbu r0,1(r5)
27 cmpwi 0,r5,0
29 mtctr r5
40 addi r5,r3,-1
42 1: lbzu r0,1(r5)
45 addi r5,r5,-1
48 stbu r0,1(r5)
65 addi r5,r3,-1
67 1: lbzu r3,1(r5)
[all …]
|
| /arch/microblaze/kernel/ |
| D | hw_exception_handler.S | 88 lwi r5, r1, 0; \
89 mts rmsr, r5; \
93 lwi r5, r1, PT_R5; \
339 swi r5, r1, PT_R5
348 mfs r5, rmsr;
350 swi r5, r1, 0;
357 andi r5, r4, 0x1000; /* Check ESR[DS] */
358 beqi r5, not_in_delay_slot; /* Branch if ESR[DS] not set */
365 andi r5, r4, 0x1F; /* Extract ESR[EXC] */
369 addk r6, r5, r5; /* << 1 */
[all …]
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| /arch/microblaze/lib/ |
| D | fastcopy.S | 45 addi r3, r5, 0
52 andi r4, r5, 3 /* n = d & 3 */
63 sbi r11, r5, 0 /* *d = h */
65 addi r5, r5, 1 /* d++ */
88 swi r9, r5, 0 /* *(d + 0) = t1 */
89 swi r10, r5, 4 /* *(d + 4) = t2 */
90 swi r11, r5, 8 /* *(d + 8) = t3 */
91 swi r12, r5, 12 /* *(d + 12) = t4 */
96 swi r9, r5, 16 /* *(d + 16) = t1 */
97 swi r10, r5, 20 /* *(d + 20) = t2 */
[all …]
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| D | umodsi3.S | 24 beqid r5, result_is_zero /* result is zero */
30 rsub r18, r5, r6
34 xor r18, r5, r6
36 addik r3, r5, 0
39 rsub r18, r5, r6 /* microblazecmp */
47 and r5, r5, r18
50 rsub r3, r6, r5
53 blti r5, div2
55 add r5, r5, r5 /* left shift logical r5 */
56 bgeid r5, div1
[all …]
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| D | divsi3.S | 23 beqi r5, result_is_zero /* result is zero */
24 bgeid r5, r5_pos
25 xor r28, r5, r6 /* get the sign of the result */
26 rsubi r5, r5, 0 /* make r5 positive */
37 blti r5, div2 /* this traps r5 == 0x80000000 */
39 add r5, r5, r5 /* left shift logical r5 */
40 bgtid r5, div1
44 add r5, r5, r5
|
| /arch/powerpc/lib/ |
| D | mem_64.S | 21 cmplw cr1,r5,r0 /* do we get that far? */
27 subf r5,r0,r5
37 3: srdi. r0,r5,6
38 clrldi r5,r5,58
52 5: srwi. r0,r5,3
53 clrlwi r5,r5,29
69 8: cmpwi r5,0
70 PPC_MTOCRF(1,r5)
89 rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
90 add r6,r3,r5
[all …]
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| D | copy_32.S | 47 addi r5,r5,-(16 * n); \
50 addi r5,r5,-(16 * n); \
87 cmplwi 0,r5,4
92 add r5,r0,r5
101 add r8,r7,r5
116 clrlwi r5,r8,32-LG_CACHELINE_BYTES
117 addi r5,r5,4
119 2: srwi r0,r5,2
124 6: andi. r5,r5,3
125 7: cmpwi 0,r5,0
[all …]
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| /arch/powerpc/platforms/83xx/ |
| D | suspend-asm.S | 66 lwz r5, 0(r4)
69 stw r5, SS_MEMSAVE+0(r3)
72 mfspr r5, SPRN_HID0
76 stw r5, SS_HID+0(r3)
81 mfspr r5, SPRN_IABR2
88 stw r5, SS_IABR+4(r3)
95 mfspr r5, SPRN_SPRG1
101 stw r5, SS_SPRG+4(r3)
107 mfspr r5, SPRN_DBAT0L
112 stw r5, SS_DBAT+0x04(r3)
[all …]
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| /arch/sh/lib64/ |
| D | udivdi3.S | 8 shlri r6,49,r5
10 sub r21,r5,r1
14 mmulfx.w r5,r4,r4
22 mmulfx.w r5,r4,r4
28 addi r1,-3,r5
29 mulu.l r5,r19,r5
34 mulu.l r5,r3,r8
44 shlld r5,r0,r8
47 mulu.l r21,r3,r5
52 sub r2,r5,r2
[all …]
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| /arch/openrisc/kernel/ |
| D | head.S | 57 #define EMERGENCY_PRINT_STORE_GPR5 l.sw 0x24(r0),r5
58 #define EMERGENCY_PRINT_LOAD_GPR5 l.lwz r5,0x24(r0)
88 #define EXCEPTION_STORE_GPR5 l.sw 0x70(r0),r5
89 #define EXCEPTION_LOAD_GPR5 l.lwz r5,0x70(r0)
459 CLEAR_GPR(r5)
526 LOAD_SYMBOL_2_GPR(r5,SPR_DTLBMR_BASE(0))
530 l.mtspr r5,r0,0x0
533 l.addi r5,r5,1
595 CLEAR_GPR(r5)
647 l.addi r5,r0,-1
[all …]
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| /arch/arc/kernel/ |
| D | head.S | 27 lr r5, [ARC_REG_IC_BCR]
28 breq r5, 0, 1f ; I$ doesn't exist
40 lr r5, [ARC_REG_DC_CTRL]
41 bclr r5, r5, 6 ; Invalidate (discard w/o wback)
43 bclr r5, r5, 0 ; Enable (+Inv)
45 bset r5, r5, 0 ; Disable (+Inv)
47 sr r5, [ARC_REG_DC_CTRL]
|
| /arch/arm/kernel/ |
| D | head-common.S | 51 ldr r5, [r2, #0]
54 cmp r5, r6
57 cmp r5, #ATAG_CORE_SIZE @ is first tag ATAG_CORE?
58 cmpne r5, #ATAG_CORE_SIZE_EMPTY
60 ldr r5, [r2, #4]
62 cmp r5, r6
84 ldmia r3!, {r4, r5, r6, r7}
85 cmp r4, r5 @ Copy data segment if needed
86 1: cmpne r5, r6
88 strne fp, [r5], #4
[all …]
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| /arch/powerpc/kernel/vdso64/ |
| D | gettimeofday.S | 40 std r5,TVAL64_TV_USEC(r11) /* store usec in tv */
44 lwz r5,CFG_TZ_DSTTIME(r3)
46 stw r5,TZONE_TZ_DSTTIME(r10)
104 add r5,r5,r9
105 cmpd cr0,r5,r7
106 cmpdi cr1,r5,0
108 subf r5,r7,r5
112 add r5,r5,r7
115 std r5,TSPC64_TV_NSEC(r11)
151 lis r5,CLOCK_REALTIME_RES@h
[all …]
|