Home
last modified time | relevance | path

Searched refs:reset (Results 1 – 25 of 529) sorted by relevance

12345678910>>...22

/arch/m68k/coldfire/
DMakefile18 obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
19 obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
20 obj-$(CONFIG_M520x) += m520x.o pit.o intc-simr.o reset.o
21 obj-$(CONFIG_M523x) += m523x.o pit.o dma_timer.o intc-2.o reset.o
22 obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
23 obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
24 obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
26 obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
27 obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
28 obj-$(CONFIG_M53xx) += m53xx.o timers.o intc-simr.o reset.o
[all …]
/arch/cris/arch-v10/kernel/
Ddma.c231 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, reset); in cris_free_dma()
233 IO_STATE_VALUE(R_DMA_CH0_CMD, cmd, reset)); in cris_free_dma()
236 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, reset); in cris_free_dma()
238 IO_STATE_VALUE(R_DMA_CH1_CMD, cmd, reset)); in cris_free_dma()
241 *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, reset); in cris_free_dma()
243 IO_STATE_VALUE(R_DMA_CH2_CMD, cmd, reset)); in cris_free_dma()
246 *R_DMA_CH3_CMD = IO_STATE(R_DMA_CH3_CMD, cmd, reset); in cris_free_dma()
248 IO_STATE_VALUE(R_DMA_CH3_CMD, cmd, reset)); in cris_free_dma()
251 *R_DMA_CH4_CMD = IO_STATE(R_DMA_CH4_CMD, cmd, reset); in cris_free_dma()
253 IO_STATE_VALUE(R_DMA_CH4_CMD, cmd, reset)); in cris_free_dma()
[all …]
/arch/arm/boot/dts/
Dtegra30.dtsi47 reset-names = "pex", "afi", "pcie_x";
97 reset-names = "host1x";
110 reset-names = "mpe";
119 reset-names = "vi";
128 reset-names = "epp";
137 reset-names = "isp";
146 reset-names = "2d";
157 reset-names = "3d", "3d2";
168 reset-names = "dc";
187 reset-names = "dc";
[all …]
Dtegra20.dtsi19 reset-names = "host1x";
32 reset-names = "mpe";
41 reset-names = "vi";
50 reset-names = "epp";
59 reset-names = "isp";
68 reset-names = "2d";
76 reset-names = "3d";
87 reset-names = "dc";
104 reset-names = "dc";
121 reset-names = "hdmi";
[all …]
Dtegra114.dtsi20 reset-names = "host1x";
33 reset-names = "2d";
41 reset-names = "3d";
52 reset-names = "dc";
71 reset-names = "dc";
90 reset-names = "hdmi";
102 reset-names = "dsi";
118 reset-names = "dsi";
168 #reset-cells = <1>;
213 reset-names = "dma";
[all …]
Dtegra124.dtsi6 #include <dt-bindings/reset/tegra124-car.h>
50 reset-names = "pex", "afi", "pcie_x";
87 reset-names = "host1x";
102 reset-names = "dc";
117 reset-names = "dc";
132 reset-names = "hdmi";
146 reset-names = "sor";
158 reset-names = "dpaux";
192 reset-names = "gpu";
227 #reset-cells = <1>;
[all …]
Dstih41x-b2000.dtsi59 snps,reset-gpio = <&pio106 2>;
60 snps,reset-active-low;
61 snps,reset-delays-us = <0 10000 10000>;
69 snps,reset-gpio = <&pio4 7>;
70 snps,reset-active-low;
71 snps,reset-delays-us = <0 10000 10000>;
Dstih418.dtsi39 reset-names = "global", "port";
48 reset-names = "global", "port";
58 reset-names = "power", "softreset";
72 reset-names = "power", "softreset";
84 reset-names = "power", "softreset";
98 reset-names = "power", "softreset";
Dstih410.dtsi25 reset-names = "global", "port";
36 reset-names = "global", "port";
49 reset-names = "power", "softreset";
66 reset-names = "power", "softreset";
81 reset-names = "power", "softreset";
98 reset-names = "power", "softreset";
168 reset-names = "compo-main", "compo-aux";
178 reset-names = "tvout";
218 reset-names = "hdmi";
Dox810se.dtsi245 resets = <&reset 17>;
259 resets = <&reset 18>;
273 resets = <&reset 22>;
287 resets = <&reset 23>;
301 reset: reset-controller { label
302 compatible = "oxsemi,ox810se-reset";
303 #reset-cells = <1>;
Dsun9i-a80.dtsi164 #reset-cells = <1>;
175 #reset-cells = <1>;
480 reset-names = "phy";
503 reset-names = "hsic", "phy";
539 reset-names = "hsic", "phy";
551 reset-names = "ahb";
565 reset-names = "ahb";
579 reset-names = "ahb";
593 reset-names = "ahb";
606 reset-names = "ahb";
[all …]
Domap3-cm-t3530.dts13 /* Regulator to trigger the reset signal of the Wifi module */
14 mmc2_sdio_reset: regulator-mmc2-sdio-reset {
16 regulator-name = "regulator-mmc2-sdio-reset";
Dstih416.dtsi15 #include <dt-bindings/reset/stih416-resets.h>
47 #reset-cells = <1>;
52 #reset-cells = <1>;
199 reset-names = "stmmaceth";
221 reset-names = "stmmaceth";
335 reset-names = "pwr-dwn", "sw-rst";
363 reset-names = "power", "softreset";
378 reset-names = "power", "softreset";
394 reset-names = "power", "softreset";
408 reset-names = "power", "softreset";
[all …]
Ddove-d3plug.dts93 reset-gpios = <&gpio0 26 1>;
94 reset-delay-us = <20000>;
101 reset-gpios = <&gpio0 25 1>;
/arch/alpha/oprofile/
Dop_model_ev6.c24 unsigned long ctl, reset, need_reset, i; in ev6_reg_setup() local
45 reset = need_reset = 0; in ev6_reg_setup()
54 reset |= (0x100000 - count) << (i ? 6 : 28); in ev6_reg_setup()
58 reg->reset_values = reset; in ev6_reg_setup()
Dop_model_ev5.c30 int i, ctl, reset, need_reset; in common_reg_setup() local
89 ctl = reset = need_reset = 0; in common_reg_setup()
106 reset |= (max - count) << (48 - 16*i); in common_reg_setup()
111 reg->reset_values = reset; in common_reg_setup()
Dop_model_ev67.c25 unsigned long ctl, reset, need_reset, i; in ev67_reg_setup() local
50 reset = need_reset = 0; in ev67_reg_setup()
59 reset |= (0x100000 - count) << (i ? 6 : 28); in ev67_reg_setup()
63 reg->reset_values = reset; in ev67_reg_setup()
/arch/arm64/boot/dts/nvidia/
Dtegra132.dtsi48 reset-names = "pex", "afi", "pcie_x";
89 reset-names = "host1x";
104 reset-names = "dc";
119 reset-names = "dc";
134 reset-names = "hdmi";
148 reset-names = "sor";
160 reset-names = "dpaux";
189 reset-names = "gpu";
222 #reset-cells = <1>;
239 reset-names = "actmon";
[all …]
Dtegra210.dtsi22 reset-names = "host1x";
37 reset-names = "dpaux";
82 reset-names = "dc";
97 reset-names = "dc";
112 reset-names = "dsi";
142 reset-names = "dsi";
180 reset-names = "sor";
200 reset-names = "sor";
217 reset-names = "dpaux";
289 reset-names = "gpu";
[all …]
/arch/powerpc/platforms/52xx/
Dmpc52xx_common.c284 int reset; in mpc5200_psc_ac97_gpio_reset() local
292 reset = PSC1_RESET; /* AC97_1_RES */ in mpc5200_psc_ac97_gpio_reset()
298 reset = PSC2_RESET; /* AC97_2_RES */ in mpc5200_psc_ac97_gpio_reset()
316 setbits8(&wkup_gpio->wkup_gpioe, reset); in mpc5200_psc_ac97_gpio_reset()
319 setbits8(&wkup_gpio->wkup_ddr, reset); in mpc5200_psc_ac97_gpio_reset()
324 clrbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
330 setbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
/arch/s390/include/asm/
Dreset.h16 extern void register_reset_call(struct reset_call *reset);
17 extern void unregister_reset_call(struct reset_call *reset);
/arch/mips/boot/dts/qca/
Dar9132.dtsi122 rst: reset-controller@1806001c {
123 compatible = "qca,ar9132-reset",
124 "qca,ar7100-reset";
127 #reset-cells = <1>;
163 reset-names = "usb-phy", "usb-suspend-override";
Dar9331.dtsi110 rst: reset-controller@1806001c {
111 compatible = "qca,ar7100-reset";
114 #reset-cells = <1>;
148 reset-names = "usb-phy", "usb-suspend-override";
/arch/xtensa/boot/boot-elf/
Dbootstrap.S28 .global reset symbol
74 reset: label
/arch/arm/mach-davinci/
Dclock.h106 int (*reset) (struct clk *clk, bool reset); member
134 int davinci_clk_reset(struct clk *clk, bool reset);

12345678910>>...22