| /arch/mips/include/asm/mach-pmcs-msp71xx/ |
| D | msp_prom.h | 39 #define FPGA_IS_POLO(revision) \ argument
40 (((revision >= 0xb0) && (revision < 0xd0)))
41 #define FPGA_IS_5000(revision) \ argument
42 ((revision >= 0x80) && (revision <= 0x90))
43 #define FPGA_IS_ZEUS(revision) ((revision < 0x7f)) argument
44 #define FPGA_IS_DUET(revision) \ argument
45 (((revision >= 0xa0) && (revision < 0xb0)))
46 #define FPGA_IS_MSP4200(revision) ((revision >= 0xd0)) argument
47 #define FPGA_IS_MSP7100(revision) ((revision >= 0xd0)) argument
|
| /arch/arm/mach-imx/ |
| D | anatop.c | 116 unsigned int revision; in imx_init_revision_from_anatop() local
137 revision = IMX_CHIP_REVISION_2_0; in imx_init_revision_from_anatop()
139 revision = IMX_CHIP_REVISION_1_0; in imx_init_revision_from_anatop()
142 revision = IMX_CHIP_REVISION_1_1; in imx_init_revision_from_anatop()
145 revision = IMX_CHIP_REVISION_1_2; in imx_init_revision_from_anatop()
148 revision = IMX_CHIP_REVISION_1_3; in imx_init_revision_from_anatop()
151 revision = IMX_CHIP_REVISION_1_4; in imx_init_revision_from_anatop()
158 revision = IMX_CHIP_REVISION_1_5; in imx_init_revision_from_anatop()
168 revision = digprog & 0xff; in imx_init_revision_from_anatop()
172 imx_set_soc_revision(revision); in imx_init_revision_from_anatop()
|
| D | cpu.c | 145 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d", in imx_soc_device_init()
148 if (!soc_dev_attr->revision) in imx_soc_device_init()
158 kfree(soc_dev_attr->revision); in imx_soc_device_init()
|
| /arch/arm/mach-zynq/ |
| D | common.c | 78 u32 revision; in zynq_get_revision() local
92 revision = readl(zynq_devcfg_base + ZYNQ_DEVCFG_MCTRL); in zynq_get_revision()
93 revision >>= ZYNQ_DEVCFG_PS_VERSION_SHIFT; in zynq_get_revision()
94 revision &= ZYNQ_DEVCFG_PS_VERSION_MASK; in zynq_get_revision()
98 return revision; in zynq_get_revision()
124 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "0x%x", system_rev); in zynq_init_machine()
131 kfree(soc_dev_attr->revision); in zynq_init_machine()
|
| /arch/cris/arch-v10/kernel/ |
| D | setup.c | 54 unsigned long revision; in show_cpuinfo() local
59 revision = rdvr(); in show_cpuinfo()
61 if (revision >= ARRAY_SIZE(cpu_info)) in show_cpuinfo()
64 info = &cpu_info[revision]; in show_cpuinfo()
82 revision, in show_cpuinfo()
|
| /arch/cris/arch-v32/kernel/ |
| D | setup.c | 61 unsigned long revision; in show_cpuinfo() local
66 revision = rdvr(); in show_cpuinfo()
69 if (cpinfo[i].rev == revision) { in show_cpuinfo()
92 revision, in show_cpuinfo()
|
| /arch/arm/mach-tegra/ |
| D | tegra.c | 98 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", in tegra_dt_init()
99 tegra_sku_info.revision); in tegra_dt_init()
105 kfree(soc_dev_attr->revision); in tegra_dt_init()
|
| /arch/mips/pci/ |
| D | fixup-cobalt.c | 103 printk(KERN_INFO "Galileo: revision %u\n", dev->revision); in qube_raq_galileo_fixup()
106 if (dev->revision >= 0x10) { in qube_raq_galileo_fixup()
109 } else if (dev->revision == 0x1 || dev->revision == 0x2) in qube_raq_galileo_fixup()
|
| /arch/mips/pmcs-msp71xx/ |
| D | msp_setup.c | 154 unsigned long revision; in prom_init() local
168 revision = identify_revision(); in prom_init()
172 if (FPGA_IS_MSP4200(revision)) { in prom_init()
|
| /arch/openrisc/kernel/ |
| D | setup.c | 114 unsigned int revision; in print_cpuinfo() local
117 revision = (vr & SPR_VR_REV); in print_cpuinfo()
120 version, revision, cpuinfo.clock_frequency / 1000000); in print_cpuinfo()
326 int version, revision; in show_cpuinfo() local
330 revision = vr & SPR_VR_REV; in show_cpuinfo()
344 revision, in show_cpuinfo()
|
| /arch/arm64/kernel/ |
| D | acpi.c | 158 if (table->revision < 5 || in acpi_fadt_sanity_check()
159 (table->revision == 5 && fadt->minor_revision < 1)) { in acpi_fadt_sanity_check()
161 table->revision, fadt->minor_revision); in acpi_fadt_sanity_check()
|
| /arch/powerpc/platforms/52xx/ |
| D | efika.c | 147 const char *revision; in efika_show_cpuinfo() local
155 revision = of_get_property(root, "revision", NULL); in efika_show_cpuinfo()
164 if (revision) in efika_show_cpuinfo()
165 seq_printf(m, "revision\t: %s\n", revision); in efika_show_cpuinfo()
|
| /arch/m68k/include/asm/ |
| D | dvma.h | 125 enum dvma_rev revision; member
131 #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1)
132 #define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1)
233 if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \
|
| /arch/arm/mach-omap1/ |
| D | gpio15xx.c | 41 .revision = USHRT_MAX,
82 .revision = USHRT_MAX,
|
| /arch/x86/xen/ |
| D | efi.c | 36 .revision = 0, /* Initialized later. */
118 efi_systab_xen.fw_revision = info->vendor.revision; in xen_efi_probe()
127 efi_systab_xen.hdr.revision = info->version; in xen_efi_probe()
|
| /arch/arm/mach-mvebu/ |
| D | mvebu-soc-id.c | 165 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X", soc_rev); in mvebu_soc_device()
171 kfree(soc_dev_attr->revision); in mvebu_soc_device()
|
| /arch/arm/mach-at91/ |
| D | soc.c | 126 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X", in at91_soc_init()
130 kfree(soc_dev_attr->revision); in at91_soc_init()
|
| /arch/alpha/include/asm/ |
| D | hwrpb.h | 98 unsigned long revision; member
166 unsigned long revision; member
|
| /arch/x86/kernel/cpu/mcheck/ |
| D | mce-apei.c | 86 rcd.hdr.revision = CPER_RECORD_REV; in apei_write_mce()
100 rcd.sec_hdr.revision = CPER_SEC_REV; in apei_write_mce()
|
| /arch/ia64/include/asm/ |
| D | fpswa.h | 66 unsigned int revision; member
|
| /arch/mips/kernel/ |
| D | mips-cm.c | 301 unsigned long revision; in mips_cm_error_report() local
308 revision = mips_cm_revision(); in mips_cm_error_report()
310 if (revision < CM_REV_CM3) { /* CM2 */ in mips_cm_error_report()
|
| /arch/arm/mm/ |
| D | cache-l2x0.c | 550 unsigned revision; in l2c310_save() local
563 revision = readl_relaxed(base + L2X0_CACHE_ID) & in l2c310_save()
567 if (revision >= L310_CACHE_ID_RTL_R2P0) in l2c310_save()
572 if (revision >= L310_CACHE_ID_RTL_R3P0) in l2c310_save()
579 unsigned revision; in l2c310_configure() local
593 revision = readl_relaxed(base + L2X0_CACHE_ID) & in l2c310_configure()
596 if (revision >= L310_CACHE_ID_RTL_R2P0) in l2c310_configure()
599 if (revision >= L310_CACHE_ID_RTL_R3P0) in l2c310_configure()
693 unsigned revision = cache_id & L2X0_CACHE_ID_RTL_MASK; in l2c310_fixup() local
698 revision < L310_CACHE_ID_RTL_R2P0 && in l2c310_fixup()
[all …]
|
| /arch/avr32/boards/merisc/ |
| D | merisc_sysfs.c | 43 __ATTR(revision, S_IRUGO, merisc_revision_show, NULL),
|
| /arch/cris/boot/compressed/ |
| D | misc.c | 279 char revision; in decompress_kernel() local
363 __asm__ volatile ("move $vr,%0" : "=rm" (revision)); in decompress_kernel()
364 if (revision < compile_rev) { in decompress_kernel()
|
| /arch/arm/mach-omap2/ |
| D | dma.c | 118 u8 revision = dma_read(REVISION, 0) & 0xff; in omap2_show_dma_caps() local
120 revision >> 4, revision & 0xf); in omap2_show_dma_caps()
|