/arch/metag/mm/ |
D | cache.c | 202 int loops, step; in metag_phys_data_cache_flush() local 216 step = 64; in metag_phys_data_cache_flush() 238 loops /= step; in metag_phys_data_cache_flush() 246 flush3 = flush1 + step; in metag_phys_data_cache_flush() 247 flush1 = flush0 + step; in metag_phys_data_cache_flush() 248 step <<= 1; in metag_phys_data_cache_flush() 265 flush0 += step; in metag_phys_data_cache_flush() 266 flush1 += step; in metag_phys_data_cache_flush() 267 flush2 += step; in metag_phys_data_cache_flush() 268 flush3 += step; in metag_phys_data_cache_flush() [all …]
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/arch/sh/mm/ |
D | tlb-sh5.c | 24 cpu_data->dtlb.step = 0x10; in sh64_tlb_init() 26 cpu_data->dtlb.first = DTLB_FIXED | cpu_data->dtlb.step; in sh64_tlb_init() 31 cpu_data->dtlb.step); in sh64_tlb_init() 35 cpu_data->itlb.step = 0x10; in sh64_tlb_init() 37 cpu_data->itlb.first = ITLB_FIXED | cpu_data->itlb.step; in sh64_tlb_init() 41 cpu_data->itlb.step); in sh64_tlb_init() 61 cpu_data->dtlb.first += cpu_data->dtlb.step; in sh64_get_wired_dtlb_entry() 62 cpu_data->dtlb.next += cpu_data->dtlb.step; in sh64_get_wired_dtlb_entry() 99 if (entry < (cpu_data->dtlb.first - cpu_data->dtlb.step)) in sh64_put_wired_dtlb_entry() 103 cpu_data->dtlb.first -= cpu_data->dtlb.step; in sh64_put_wired_dtlb_entry()
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/arch/powerpc/platforms/powernv/ |
D | subcore.c | 145 u8 step; member 151 static void wait_for_sync_step(int step) in wait_for_sync_step() argument 156 while(per_cpu(split_state, i).step < step) in wait_for_sync_step() 187 per_cpu(split_state, cpu).step = SYNC_STEP_UNSPLIT; in unsplit_core() 221 split_core_secondary_loop(&per_cpu(split_state, cpu).step); in split_core() 253 per_cpu(split_state, smp_processor_id()).step = SYNC_STEP_FINISHED; in cpu_do_split() 311 while(per_cpu(split_state, cpu).step < SYNC_STEP_FINISHED) in cpu_update_split_mode() 347 state->step = SYNC_STEP_INITIAL; in set_subcores_per_core()
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/arch/microblaze/kernel/ |
D | ptrace.c | 157 int step; in do_syscall_trace_leave() local 161 step = test_thread_flag(TIF_SINGLESTEP); in do_syscall_trace_leave() 162 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in do_syscall_trace_leave() 163 tracehook_report_syscall_exit(regs, step); in do_syscall_trace_leave()
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/arch/openrisc/kernel/ |
D | ptrace.c | 198 int step; in do_syscall_trace_leave() local 202 step = test_thread_flag(TIF_SINGLESTEP); in do_syscall_trace_leave() 203 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in do_syscall_trace_leave() 204 tracehook_report_syscall_exit(regs, step); in do_syscall_trace_leave()
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/arch/arm/include/asm/ |
D | vfpmacros.h | 32 addeq \base, \base, #32*4 @ step over unused register space 38 addne \base, \base, #32*4 @ step over unused register space 56 addeq \base, \base, #32*4 @ step over unused register space 62 addne \base, \base, #32*4 @ step over unused register space
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/arch/sh/include/asm/ |
D | tlb_64.h | 31 tlb += cpu_data->dtlb.step) 41 tlb += cpu_data->itlb.step)
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/arch/h8300/kernel/ |
D | ptrace.c | 198 int step; in do_syscall_trace_leave() local 202 step = test_thread_flag(TIF_SINGLESTEP); in do_syscall_trace_leave() 203 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in do_syscall_trace_leave() 204 tracehook_report_syscall_exit(regs, step); in do_syscall_trace_leave()
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/arch/frv/kernel/ |
D | break.S | 82 # catch the return from a TLB-miss handler that had single-step disabled 252 # step through an internal exception from kernel mode 259 # step through an external interrupt from kernel mode 336 # we also want to single step anyway, but after fixing up so that we get an event on the 360 # and then process the single step 363 # step through an internal exception from uspace mode 370 # step through an external interrupt from kernel mode 409 # step through an ITLB-miss handler from user mode 454 # step through a DTLB-miss handler from user mode 472 # step through a DTLB-miss handler from kernel mode
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D | entry-table.S | 39 # (5) The fixup table for kernel-trap single-step 40 # (6) The fixup table for user-trap single-step 42 # Due to the way single-stepping works on this CPU (single-step is not 44 # we have to catch the single-step event in break.S and jump to the fixup 49 # single-step bypass management
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/arch/x86/entry/ |
D | common.c | 217 bool step; in syscall_slow_exit_work() local 230 step = unlikely( in syscall_slow_exit_work() 233 if (step || cached_flags & _TIF_SYSCALL_TRACE) in syscall_slow_exit_work() 234 tracehook_report_syscall_exit(regs, step); in syscall_slow_exit_work()
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/arch/arm/mach-pxa/ |
D | viper.c | 185 int step; in viper_set_core_cpu_voltage() local 188 step = divisor; in viper_set_core_cpu_voltage() 190 step = current_voltage_divisor + STEP; in viper_set_core_cpu_voltage() 192 step = current_voltage_divisor - STEP; in viper_set_core_cpu_voltage() 194 step = divisor; in viper_set_core_cpu_voltage() 203 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i); in viper_set_core_cpu_voltage() 218 current_voltage_divisor = step; in viper_set_core_cpu_voltage()
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/arch/arm/boot/dts/ |
D | bcm5301x-nand-cs0-bch1.dtsi | 14 nand-ecc-step-size = <512>;
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D | bcm963138dvt.dts | 39 nand-ecc-step-size = <512>;
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D | bcm5301x-nand-cs0-bch8.dtsi | 17 nand-ecc-step-size = <512>;
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D | bcm7445-bcm97445svmb.dts | 22 nand-ecc-step-size = <512>;
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/arch/mips/boot/dts/brcm/ |
D | bcm97xxx-nand-cs1-bch4.dtsi | 8 nand-ecc-step-size = <512>;
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D | bcm97xxx-nand-cs1-bch24.dtsi | 8 nand-ecc-step-size = <1024>;
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/arch/blackfin/kernel/ |
D | ptrace.c | 407 int step; in syscall_trace_leave() local 409 step = test_thread_flag(TIF_SINGLESTEP); in syscall_trace_leave() 410 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in syscall_trace_leave() 411 tracehook_report_syscall_exit(regs, step); in syscall_trace_leave()
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/arch/mn10300/kernel/ |
D | switch_to.S | 81 # Lift the single-step breakpoints when the task being traced is switched out 91 # Clear the single-step flag to prevent us coming this way until we get 132 # Reinstall the single-step breakpoints when the task being traced is switched
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/arch/microblaze/kernel/cpu/ |
D | cache.c | 106 int step = -line_length; \ 107 WARN_ON(step >= 0); \ 112 : : "r" (len), "r" (step) \ 126 int step = -line_length; \ 137 "r" (step) : "memory"); \
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/arch/arm64/kernel/ |
D | hw_breakpoint.c | 630 int i, step = 0, *kernel_step; in breakpoint_handler() local 665 step = 1; in breakpoint_handler() 670 if (!step) in breakpoint_handler() 741 int i, step = 0, *kernel_step, access, closest_match = 0; in watchpoint_handler() local 791 step = 1; in watchpoint_handler() 802 step = 1; in watchpoint_handler() 806 if (!step) in watchpoint_handler()
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/arch/ia64/ |
D | Kconfig.debug | 30 are compiling for an Itanium A step processor 48 from step B3 or later don't have this problem. If you're unsure,
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/arch/sh/kernel/ |
D | ptrace_64.c | 533 int step; in do_syscall_trace_leave() local 540 step = test_thread_flag(TIF_SINGLESTEP); in do_syscall_trace_leave() 541 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in do_syscall_trace_leave() 542 tracehook_report_syscall_exit(regs, step); in do_syscall_trace_leave()
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D | ptrace_32.c | 513 int step; in do_syscall_trace_leave() local 520 step = test_thread_flag(TIF_SINGLESTEP); in do_syscall_trace_leave() 521 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) in do_syscall_trace_leave() 522 tracehook_report_syscall_exit(regs, step); in do_syscall_trace_leave()
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