| /arch/x86/purgatory/ |
| D | sha256.c | 50 u32 a, b, c, d, e, f, g, h, t1, t2; in sha256_transform() local
68 t2 = e0(a) + Maj(a, b, c); d += t1; h = t1 + t2; in sha256_transform()
70 t2 = e0(h) + Maj(h, a, b); c += t1; g = t1 + t2; in sha256_transform()
72 t2 = e0(g) + Maj(g, h, a); b += t1; f = t1 + t2; in sha256_transform()
74 t2 = e0(f) + Maj(f, g, h); a += t1; e = t1 + t2; in sha256_transform()
76 t2 = e0(e) + Maj(e, f, g); h += t1; d = t1 + t2; in sha256_transform()
78 t2 = e0(d) + Maj(d, e, f); g += t1; c = t1 + t2; in sha256_transform()
80 t2 = e0(c) + Maj(c, d, e); f += t1; b = t1 + t2; in sha256_transform()
82 t2 = e0(b) + Maj(b, c, d); e += t1; a = t1 + t2; in sha256_transform()
85 t2 = e0(a) + Maj(a, b, c); d += t1; h = t1 + t2; in sha256_transform()
[all …]
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| /arch/x86/crypto/ |
| D | poly1305-sse2-x86_64.S | 41 #define t2 %xmm4 macro
88 movd h3,t2
91 punpcklqdq t2,h23
96 movd 0x03(m),t2
97 psrld $2,t2
98 punpcklqdq t2,t1
103 movd 0x09(m),t2
105 psrld $6,t2
106 punpcklqdq t2,t1
120 movd s4,t2
[all …]
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| D | poly1305-avx2-x86_64.S | 61 #define t2 %ymm6 macro
106 vpunpcklqdq t2,t1,t1
115 vpunpcklqdq t2,t1,t1
126 vpunpcklqdq t2,t1,t1
137 vpunpcklqdq t2,t1,t1
148 vpunpcklqdq t2,t1,t1
161 vpunpcklqdq t2,t1,t1
173 vpunpcklqdq t2,t1,t1
186 vpunpcklqdq t2,t1,t1
199 vpunpcklqdq t2,t1,t1
[all …]
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| D | glue_helper-asm-avx2.S | 61 t1x, t2, t2x, t3, t3x, t4, t5) \ argument
71 vinserti128 $1, t2x, t3, t2; /* ab: le0 ; cd: le1 */ \
72 vpshufb t1, t2, x0; \
75 add2_le128(t2, t0, t4, t3, t5); /* ab: le2 ; cd: le3 */ \
76 vpshufb t1, t2, x1; \
77 add2_le128(t2, t0, t4, t3, t5); \
78 vpshufb t1, t2, x2; \
79 add2_le128(t2, t0, t4, t3, t5); \
80 vpshufb t1, t2, x3; \
81 add2_le128(t2, t0, t4, t3, t5); \
[all …]
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| /arch/mips/kernel/ |
| D | octeon_switch.S | 42 LONG_ADDI t2, a0, THREAD_CVMSEG /* Where to store CVMSEG to */
50 LONG_S t8, 0(t2) /* Store CVMSEG to thread storage */
51 LONG_ADDU t2, LONGSIZE*2 /* Increment loc in thread storage */
53 LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
77 set_saved_sp t0, t1, t2
104 dmfc2 t2, 0x0200
109 sd t2, OCTEON_CP2_CRC_POLY(a0)
123 dmfc2 t2, 0x0081
129 sd t2, OCTEON_CP2_3DES_KEY+8(a0)
130 dmfc2 t2, 0x0102
[all …]
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| D | cps-vec.S | 342 li t2, 31
343 subu t1, t2, t1
344 li t2, 1
345 sll t1, t2, t1
374 PTR_LI t2, ~0x7fff
375 and t1, t1, t2
376 PTR_LI t2, UNCAC_BASE
377 PTR_ADD t1, t1, t2
538 xori t2, t1, 0x7
539 beqz t2, 1f
[all …]
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| /arch/arm/crypto/ |
| D | sha512-armv4.pl | 68 $t2="r11";
95 ldr $t2,[sp,#$Hoff+0] @ h.lo
110 adds $Tlo,$Tlo,$t2
111 ldr $t2,[sp,#$Goff+0] @ g.lo
115 eor $t0,$t0,$t2
123 eor $t0,$t0,$t2
124 ldr $t2,[$Ktbl,#$lo] @ K[i].lo
132 adds $Tlo,$Tlo,$t2
133 and $t0,$t2,#0xff
136 ldr $t2,[sp,#$Boff+0] @ b.lo
[all …]
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| D | sha256-armv4.pl | 56 $t2="r12";
74 add $a,$a,$t2 @ h+=Maj(a,b,c) from the past
81 add $a,$a,$t2 @ h+=Maj(a,b,c) from the past
82 ldrb $t2,[$inp,#2]
84 orr $t1,$t1,$t2,lsl#8
85 ldrb $t2,[$inp],#4
91 orr $t1,$t1,$t2,lsl#24
96 ldr $t2,[$Ktbl],#4 @ *K256++
102 add $h,$h,$t2 @ h+=K256[i]
107 and $t2,$t2,#0xff
[all …]
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| /arch/mips/netlogic/common/ |
| D | smpboot.S | 63 dla t2, nlm_boot_siblings
64 dsubu t2, t1
65 daddu t2, t0
67 jalr t2
107 andi t2, t0, 0x3 /* thread num */
116 bnez t2, 1f /* skip thread programming */
124 li t2, 6 /* XLR thread mode mask */
125 nor t3, t2, zero
126 and t2, t1, t2 /* t2 - current thread mode */
130 beq v1, t2, 1f /* same as request value */
[all …]
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| D | reset.S | 62 lui t2, 0x4080 /* Enable Unaligned Access, L2HPE */
63 or t1, t1, t2
103 li t2, 0 /* index */
106 sll v0, t2, 5
123 addi t2, 1
124 bne t3, t2, 11b
188 li t2, 0x40000
189 mul t3, t2, t1 /* t3 = node * 0x40000 */
195 li t2, SYS_CPU_COHERENT_BASE
196 add t2, t2, t3 /* t2 <- SYS offset for node */
[all …]
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| /arch/mips/dec/ |
| D | int-handler.S | 134 lw t2,cpu_fpu_mask
142 and t2,t0
143 bnez t2,fpu # handle FPU immediately
213 2: lw t2,(t1)
215 and t2,t0
216 beq zero,t2,2b
240 li t2,4 # nr of bits / 2
246 li t2,4 # nr of bits / 2
252 li t2,8 # nr of bits / 2
261 li t2,8 # nr of bits / 2
[all …]
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| /arch/alpha/lib/ |
| D | stxcpy.S | 46 lda t2, -1 # e1 : build a mask against false zero
47 mskqh t2, a1, t2 # e0 : detection in the src word
49 ornot t1, t2, t2 # .. e1 :
51 cmpbge zero, t2, t8 # .. e1 : bits set iff null found
131 ldq_u t2, 8(a1) # e0 :
135 extqh t2, a1, t4 # e0 :
147 or t6, t2, t2 # e1 : already extracted before
148 cmpbge zero, t2, t8 # e0 : testing eos
156 extql t2, a1, t0 # e0 : position ho-bits of lo word
157 ldq_u t2, 8(a1) # .. e1 : read next high-order source word
[all …]
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| D | ev6-stxcpy.S | 57 lda t2, -1 # E : build a mask against false zero
58 mskqh t2, a1, t2 # U : detection in the src word (stall)
60 ornot t1, t2, t2 # E : (stall)
63 cmpbge zero, t2, t8 # E : bits set iff null found
154 ldq_u t2, 8(a1) # L :
157 extqh t2, a1, t4 # U : (stall on a1)
170 or t6, t2, t2 # E : already extracted before (stall)
171 cmpbge zero, t2, t8 # E : testing eos (stall)
179 extql t2, a1, t0 # U : position ho-bits of lo word
180 ldq_u t2, 8(a1) # U : read next high-order source word
[all …]
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| D | stxncpy.S | 54 lda t2, -1 # e1 : build a mask against false zero
55 mskqh t2, a1, t2 # e0 : detection in the src word
57 ornot t1, t2, t2 # .. e1 :
59 cmpbge zero, t2, t8 # .. e1 : bits set iff null found
126 and a2, 7, t2 # e1 :
129 sll t10, t2, t10 # e0 : t10 = bitmask of last count byte
157 ldq_u t2, 8(a1) # e0 : load second src word
160 extqh t2, a1, t4 # e0 :
173 or t6, t2, t2 # .. e1 :
174 cmpbge zero, t2, t8 # e0 : find nulls in second partial
[all …]
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| D | ev6-stxncpy.S | 65 lda t2, -1 # E : build a mask against false zero
66 mskqh t2, a1, t2 # U : detection in the src word (stall)
68 ornot t1, t2, t2 # E : (stall)
71 cmpbge zero, t2, t8 # E : bits set iff null found
159 and a2, 7, t2 # E : (stall)
163 sll t10, t2, t10 # U : t10 = bitmask of last count byte
196 ldq_u t2, 8(a1) # L : Latency=3 load second src word
199 extqh t2, a1, t4 # U : (3 cycle stall on t2)
214 or t6, t2, t2 # E : (stall)
216 cmpbge zero, t2, t8 # E : find nulls in second partial
[all …]
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| D | ev67-strrchr.S | 34 and a1, 0xff, t2 # E : 00000000000000ch
40 or t2, t4, a1 # E : 000000000000chch
46 sll a1, 32, t2 # U : 0000chch00000000
50 or t2, t3, t2 # E : 0000chchchch0000
51 or a1, t2, a1 # E : chchchchchchchch
56 xor t0, a1, t2 # E : make bytes == c zero
59 cmpbge zero, t2, t3 # E : bits set iff byte == c
74 xor t0, a1, t2 # E :
77 cmpbge zero, t2, t3 # E : bits set iff byte == c
96 ctlz t8, t2 # U0 : Latency=3 (0x40 for t8=0)
[all …]
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| D | strchr.S | 28 cmpbge zero, t0, t2 # .. e1 : bits set iff byte == zero
36 or t2, t3, t0 # e1 : bits set iff char match or zero match
44 cmpbge zero, t0, t2 # e0 : bits set iff byte == 0
46 or t2, t3, t0 # e0 :
55 and t0, 0xf0, t2 # e0 : binary search for that set bit
58 cmovne t2, 4, t2 # .. e1 :
61 addq t2, t3, t2 # e0 :
63 addq v0, t2, v0 # e0 :
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| D | strrchr.S | 35 xor t0, a1, t2 # e0 : make bytes == c zero
37 cmpbge zero, t2, t3 # e0 : bits set iff byte == c
48 xor t0, a1, t2 # e0 :
50 cmpbge zero, t2, t3 # e0 : bits set iff byte == c
70 and t8, 0xf0, t2 # e0 : binary search for the high bit set
71 cmovne t2, t2, t8 # .. e1 (zdb)
72 cmovne t2, 4, t2 # e0 :
78 addq t2, t1, t1 # e0 :
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| /arch/alpha/include/asm/ |
| D | word-at-a-time.h | 41 unsigned long t1, t2, t3; in find_zero()
46 t2 = bits & 0xcc; in find_zero()
49 if (t2) t2 = 2; in find_zero()
51 return t1 + t2 + t3; in find_zero()
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| /arch/powerpc/crypto/ |
| D | aes-spe-keys.S | 44 #define LS_BOX(r, t1, t2) \ argument
45 lis t2,PPC_AES_4K_ENCTAB@h; \
46 ori t2,t2,PPC_AES_4K_ENCTAB@l; \
47 rlwimi t2,r,4,20,27; \
48 lbz t1,8(t2); \
50 rlwimi t2,r,28,20,27; \
51 lbz t1,8(t2); \
53 rlwimi t2,r,20,20,27; \
54 lbz t1,8(t2); \
56 rlwimi t2,r,12,20,27; \
[all …]
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| /arch/mips/include/asm/mach-ip27/ |
| D | kernel-entry-init.h | 48 dsll t2, NASID_SHFT # Same for data nasid
50 or t2, t2, t0 # Physical load address of kernel data
52 dsrl t2, 12 # 4K pfn
54 dsll t2, 6 # Get pfn into place
59 or t0, t0, t2
79 move t2, t1 # text and data are here
94 lh t2, KV_RW_NASID_OFFSET(t0)
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| /arch/mips/lib/ |
| D | csum_partial.S | 26 #undef t2
30 #define t2 $10 macro
111 move t2, a1
188 andi t2, a1, 0x40
202 beqz t2, 1f
203 andi t2, a1, 0x20
211 beqz t2, .Ldo_end_words
221 andi t2, a1, 0x3
235 move a1, t2
260 lbu t2, (src)
[all …]
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| /arch/mips/include/asm/mach-malta/ |
| D | kernel-entry-init.h | 49 move t2, t1
50 ins t2, t1, 16, 3
58 or t0, t2
79 or t0, t2
84 li t2, 0x40000000 /* K bit */
85 or t0, t0, t2
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| /arch/alpha/include/uapi/asm/ |
| D | swab.h | 26 __u64 t0, t1, t2, t3; in __arch_swab32() local
31 t2 = t1 >> 16; /* t2 : 0000000000CCDDAA */ in __arch_swab32()
33 t3 = t2 & 0x00FF00FF; /* t3 : 0000000000CC00AA */ in __arch_swab32()
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| /arch/unicore32/mm/ |
| D | proc-macros.S | 137 .macro dcacheline_flush, addr, t1, t2 argument
139 ldw \t2, =_stext @ _stext must ALIGN(4096)
140 add \t2, \t2, \t1 >> #20
141 ldw \t1, [\t2+], #0x0000
142 ldw \t1, [\t2+], #0x1000
143 ldw \t1, [\t2+], #0x2000
144 ldw \t1, [\t2+], #0x3000
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