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/arch/arm/mach-omap2/
Dserial.c110 struct omap_uart_state *uart) in omap_serial_fill_uart_tx_rx_pads() argument
112 uart->default_omap_uart_pads[0].name = rx_pad_name; in omap_serial_fill_uart_tx_rx_pads()
113 uart->default_omap_uart_pads[0].flags = OMAP_DEVICE_PAD_REMUX | in omap_serial_fill_uart_tx_rx_pads()
115 uart->default_omap_uart_pads[0].enable = OMAP_PIN_INPUT | in omap_serial_fill_uart_tx_rx_pads()
117 uart->default_omap_uart_pads[0].idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0; in omap_serial_fill_uart_tx_rx_pads()
118 uart->default_omap_uart_pads[1].name = tx_pad_name; in omap_serial_fill_uart_tx_rx_pads()
119 uart->default_omap_uart_pads[1].enable = OMAP_PIN_OUTPUT | in omap_serial_fill_uart_tx_rx_pads()
121 bdata->pads = uart->default_omap_uart_pads; in omap_serial_fill_uart_tx_rx_pads()
122 bdata->pads_cnt = ARRAY_SIZE(uart->default_omap_uart_pads); in omap_serial_fill_uart_tx_rx_pads()
126 struct omap_uart_state *uart) in omap_serial_check_wakeup() argument
[all …]
/arch/mn10300/kernel/
Dmn10300-serial.c157 .uart.ops = &mn10300_serial_ops,
158 .uart.membase = (void __iomem *) &SC0CTR,
159 .uart.mapbase = (unsigned long) &SC0CTR,
160 .uart.iotype = UPIO_MEM,
161 .uart.irq = 0,
162 .uart.uartclk = 0, /* MN10300_IOCLK, */
163 .uart.fifosize = 1,
164 .uart.flags = UPF_BOOT_AUTOCONF,
165 .uart.line = 0,
166 .uart.type = PORT_MN10300,
[all …]
/arch/arm/mach-davinci/include/mach/
Duncompress.h30 u32 *uart; variable
35 if (!uart) in putc()
38 while (!(uart[UART_LSR] & UART_LSR_THRE)) in putc()
40 uart[UART_TX] = c; in putc()
45 if (!uart) in flush()
48 while (!(uart[UART_LSR] & UART_LSR_THRE)) in flush()
54 uart = (u32 *)phys; in set_uart_info()
/arch/powerpc/boot/dts/
Dcm5200.dts31 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
35 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
39 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
51 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
Da4m072.dts47 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
53 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
59 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
73 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
Dpdm360ng.dts141 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
145 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
149 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
153 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
157 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
165 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
173 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
196 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
Duc101.dts51 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
55 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
71 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
/arch/x86/include/asm/
Dserial.h24 { .uart = 0, BASE_BAUD, 0x3F8, 4, STD_COMX_FLAGS }, /* ttyS0 */ \
25 { .uart = 0, BASE_BAUD, 0x2F8, 3, STD_COMX_FLAGS }, /* ttyS1 */ \
26 { .uart = 0, BASE_BAUD, 0x3E8, 4, STD_COMX_FLAGS }, /* ttyS2 */ \
27 { .uart = 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
/arch/arm/boot/dts/
Dimx31.dtsi55 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
64 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
81 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
90 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
107 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
Dhip01.dtsi49 uart0: uart@10001000 {
50 compatible = "snps,dw-apb-uart";
59 uart1: uart@10002000 {
60 compatible = "snps,dw-apb-uart";
69 uart2: uart@10003000 {
70 compatible = "snps,dw-apb-uart";
79 uart3: uart@10006000 {
80 compatible = "snps,dw-apb-uart";
Defm32gg.dtsi101 uart0: uart@4000c000 { /* USART0 */
102 compatible = "energymicro,efm32-uart";
109 uart1: uart@4000c400 { /* USART1 */
110 compatible = "energymicro,efm32-uart";
117 uart2: uart@4000c800 { /* USART2 */
118 compatible = "energymicro,efm32-uart";
125 uart3: uart@4000e000 { /* UART0 */
126 compatible = "energymicro,efm32-uart";
133 uart4: uart@4000e400 { /* UART1 */
134 compatible = "energymicro,efm32-uart";
Ds3c2416.dtsi52 compatible = "samsung,s3c2440-uart";
53 clock-names = "uart", "clk_uart_baud2",
60 compatible = "samsung,s3c2440-uart";
61 clock-names = "uart", "clk_uart_baud2",
68 compatible = "samsung,s3c2440-uart";
69 clock-names = "uart", "clk_uart_baud2",
76 compatible = "samsung,s3c2440-uart";
79 clock-names = "uart", "clk_uart_baud2",
Dpxa2xx.dtsi79 ffuart: uart@40100000 {
80 compatible = "mrvl,pxa-uart";
87 btuart: uart@40200000 {
88 compatible = "mrvl,pxa-uart";
95 stuart: uart@40700000 {
96 compatible = "mrvl,pxa-uart";
103 hwuart: uart@41100000 {
104 compatible = "mrvl,pxa-uart";
Dmt7623.dtsi113 compatible = "mediatek,mt7623-uart",
114 "mediatek,mt6577-uart";
122 compatible = "mediatek,mt7623-uart",
123 "mediatek,mt6577-uart";
131 compatible = "mediatek,mt7623-uart",
132 "mediatek,mt6577-uart";
140 compatible = "mediatek,mt7623-uart",
141 "mediatek,mt6577-uart";
Dmt8127.dtsi138 compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
146 compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
154 compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
162 compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
Dpxa168.dtsi59 uart1: uart@d4017000 {
60 compatible = "mrvl,mmp-uart";
68 uart2: uart@d4018000 {
69 compatible = "mrvl,mmp-uart";
77 uart3: uart@d4026000 {
78 compatible = "mrvl,mmp-uart";
Ds3c64xx.dtsi119 compatible = "samsung,s3c6400-uart";
123 clock-names = "uart", "clk_uart_baud2",
131 compatible = "samsung,s3c6400-uart";
135 clock-names = "uart", "clk_uart_baud2",
143 compatible = "samsung,s3c6400-uart";
147 clock-names = "uart", "clk_uart_baud2",
155 compatible = "samsung,s3c6400-uart";
159 clock-names = "uart", "clk_uart_baud2",
Dmt2701.dtsi143 compatible = "mediatek,mt2701-uart",
144 "mediatek,mt6577-uart";
152 compatible = "mediatek,mt2701-uart",
153 "mediatek,mt6577-uart";
161 compatible = "mediatek,mt2701-uart",
162 "mediatek,mt6577-uart";
170 compatible = "mediatek,mt2701-uart",
171 "mediatek,mt6577-uart";
/arch/mips/sgi-ip27/
Dip27-console.c35 struct ioc3_uartregs *uart = console_uart(); in prom_putchar() local
37 while ((uart->iu_lsr & 0x20) == 0); in prom_putchar()
38 uart->iu_thr = c; in prom_putchar()
/arch/arc/boot/dts/
Dvdk_axs10x_mb.dtsi52 uart@0x20000 {
53 compatible = "snps,dw-apb-uart";
62 uart@0x21000 {
63 compatible = "snps,dw-apb-uart";
72 uart@0x22000 {
73 compatible = "snps,dw-apb-uart";
/arch/arm64/boot/dts/sprd/
Dsharkl64.dtsi27 compatible = "sprd,sc9836-uart";
35 compatible = "sprd,sc9836-uart";
43 compatible = "sprd,sc9836-uart";
51 compatible = "sprd,sc9836-uart";
/arch/arm/plat-samsung/
Dinit.c117 int uart; in s3c24xx_init_uartdevs() local
121 for (uart = 0; uart < no; uart++, cfg++, cfgptr++) { in s3c24xx_init_uartdevs()
126 s3c24xx_uart_devs[uart] = platdev; in s3c24xx_init_uartdevs()
/arch/arm64/boot/dts/mediatek/
Dmt6795.dtsi141 compatible = "mediatek,mt6795-uart",
142 "mediatek,mt6577-uart";
150 compatible = "mediatek,mt6795-uart",
151 "mediatek,mt6577-uart";
159 compatible = "mediatek,mt6795-uart",
160 "mediatek,mt6577-uart";
168 compatible = "mediatek,mt6795-uart",
169 "mediatek,mt6577-uart";
/arch/mips/boot/dts/ingenic/
Djz4780.dtsi48 compatible = "ingenic,jz4780-uart";
61 compatible = "ingenic,jz4780-uart";
74 compatible = "ingenic,jz4780-uart";
87 compatible = "ingenic,jz4780-uart";
100 compatible = "ingenic,jz4780-uart";
/arch/mips/boot/compressed/
DMakefile37 vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
38 vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM) += $(obj)/uart-prom.o
39 vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o
40 vmlinuzobjs-$(CONFIG_ATH79) += $(obj)/uart-ath79.o
43 extra-y += uart-ath79.c
44 $(obj)/uart-ath79.c: $(srctree)/arch/mips/ath79/early_printk.c

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