Home
last modified time | relevance | path

Searched refs:way (Results 1 – 25 of 111) sorted by relevance

12345

/arch/nios2/mm/
Dtlb.c55 unsigned int way; in flush_tlb_one_pid() local
65 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_one_pid()
70 tlbmisc = pid_misc | TLBMISC_RD | (way << TLBMISC_WAY_SHIFT); in flush_tlb_one_pid()
78 ((PAGE_SIZE * cpuinfo.tlb_num_lines) * way) + in flush_tlb_one_pid()
81 vaddr, way, (pid_misc >> TLBMISC_PID_SHIFT)); in flush_tlb_one_pid()
85 (way << TLBMISC_WAY_SHIFT); in flush_tlb_one_pid()
119 unsigned int way; in flush_tlb_one() local
129 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_one()
133 tlbmisc = pid_misc | TLBMISC_RD | (way << TLBMISC_WAY_SHIFT); in flush_tlb_one()
140 ((PAGE_SIZE * cpuinfo.tlb_num_lines) * way) + in flush_tlb_one()
[all …]
/arch/xtensa/include/asm/
Dtlbflush.h130 static inline void write_dtlb_entry (pte_t entry, int way) in write_dtlb_entry() argument
133 : : "r" (way), "r" (entry) ); in write_dtlb_entry()
136 static inline void write_itlb_entry (pte_t entry, int way) in write_itlb_entry() argument
139 : : "r" (way), "r" (entry) ); in write_itlb_entry()
179 static inline unsigned long read_dtlb_virtual (int way) in read_dtlb_virtual() argument
182 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_dtlb_virtual()
186 static inline unsigned long read_dtlb_translation (int way) in read_dtlb_translation() argument
189 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_dtlb_translation()
193 static inline unsigned long read_itlb_virtual (int way) in read_itlb_virtual() argument
196 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); in read_itlb_virtual()
[all …]
/arch/sh/mm/
Dcache-sh2a.c27 static void sh2a_flush_oc_line(unsigned long v, int way) in sh2a_flush_oc_line() argument
29 unsigned long addr = (v & 0x000007f0) | (way << 11); in sh2a_flush_oc_line()
77 int way; in sh2a__flush_wback_region() local
78 for (way = 0; way < nr_ways; way++) { in sh2a__flush_wback_region()
80 sh2a_flush_oc_line(v, way); in sh2a__flush_wback_region()
107 int way; in sh2a__flush_purge_region() local
109 for (way = 0; way < nr_ways; way++) in sh2a__flush_purge_region()
110 sh2a_flush_oc_line(v, way); in sh2a__flush_purge_region()
Dcache-sh2.c29 int way; in sh2__flush_wback_region() local
30 for (way = 0; way < 4; way++) { in sh2__flush_wback_region()
31 unsigned long data = __raw_readl(addr | (way << 12)); in sh2__flush_wback_region()
34 __raw_writel(data, addr | (way << 12)); in sh2__flush_wback_region()
Dcache-debugfs.c29 unsigned int waysize, way; in cache_seq_show() local
66 for (way = 0; way < cache->ways; way++) { in cache_seq_show()
71 seq_printf(file, "Way %d\n", way); in cache_seq_show()
/arch/arm/mm/
Dcache-xsc3l2.c56 int set, way; in xsc3_l2_inv_all() local
61 for (way = 0; way < CACHE_WAY_PER_SET; way++) { in xsc3_l2_inv_all()
62 set_way = (way << 29) | (set << 5); in xsc3_l2_inv_all()
166 int set, way; in xsc3_l2_flush_all() local
171 for (way = 0; way < CACHE_WAY_PER_SET; way++) { in xsc3_l2_flush_all()
172 set_way = (way << 29) | (set << 5); in xsc3_l2_flush_all()
Dcache-v7m.S199 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
200 clz r5, r4 @ find bit position of way size increment
207 orr r11, r10, r6 @ factor way and cache number into r11
210 dccisw r11, r6 @ clean/invalidate by set/way
213 subs r4, r4, #1 @ decrement the way
Dcache-v7.S144 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
145 clz r5, r4 @ find bit position of way size increment
151 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11
153 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11
157 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
160 subs r4, r4, #1 @ decrement the way
Dproc-feroceon.S63 tst r0, #(1 << 16) @ get way
65 movne r3, #((4 - 1) << 30) @ 4-way
67 moveq r3, #0 @ 1-way
162 2: mcr p15, 0, ip, c7, c14, 2 @ clean + invalidate D set/way
163 subs ip, ip, #(1 << 30) @ next way
/arch/mips/mm/
Dcerr-sb1.c334 unsigned short way; in extract_ic() local
343 for (way = 0; way < 4; way++) { in extract_ic()
357 : "r" ((way << 13) | addr)); in extract_ic()
360 if (way == 0) { in extract_ic()
390 way, va, valid, taghi, taglo); in extract_ic()
412 : "r" ((way << 13) | addr | (offset << 3))); in extract_ic()
490 int valid, way; in extract_dc() local
498 for (way = 0; way < 4; way++) { in extract_dc()
511 : "r" ((way << 13) | addr)); in extract_dc()
515 if (way == 0) { in extract_dc()
[all …]
/arch/arc/mm/
Dtlb.c877 #define SET_WAY_TO_IDX(mmu, set, way) ((set) * mmu->ways + (way)) argument
902 int is_valid, way; in do_tlb_overlap_fault() local
905 for (way = 0, is_valid = 0; way < mmu->ways; way++) { in do_tlb_overlap_fault()
907 SET_WAY_TO_IDX(mmu, set, way)); in do_tlb_overlap_fault()
909 pd0[way] = read_aux_reg(ARC_REG_TLBPD0); in do_tlb_overlap_fault()
910 is_valid |= pd0[way] & _PAGE_PRESENT; in do_tlb_overlap_fault()
911 pd0[way] &= PAGE_MASK; in do_tlb_overlap_fault()
919 for (way = 0; way < mmu->ways - 1; way++) { in do_tlb_overlap_fault()
923 if (!pd0[way]) in do_tlb_overlap_fault()
926 for (n = way + 1; n < mmu->ways; n++) { in do_tlb_overlap_fault()
[all …]
/arch/blackfin/mach-common/
Dpm.c107 register u32 way, bank, subbank, set; in flushinv_all_dcache() local
115 for (way = 0; way < 2; ++way) in flushinv_all_dcache()
120 way << 26 | in flushinv_all_dcache()
/arch/mn10300/mm/
Dcache-inv-by-tag.S184 # process the way 0 slot
185 mov (L1_CACHE_WAYDISP*0,a0),d0 # read the tag in the way 0 slot
198 # process the way 1 slot
199 mov (L1_CACHE_WAYDISP*1,a0),d0 # read the tag in the way 1 slot
212 # process the way 2 slot
213 mov (L1_CACHE_WAYDISP*2,a0),d0 # read the tag in the way 2 slot
226 # process the way 3 slot
227 mov (L1_CACHE_WAYDISP*3,a0),d0 # read the tag in the way 3 slot
/arch/arc/include/asm/
Dtlb-mmu1.h23 ; Calculate set index for 2-way MMU
/arch/x86/boot/
Dcode16gcc.h5 # This is done this way instead via asm() to make sure gcc does not reorder
Dpmjump.S58 # The 32-bit code sets up its own stack, but this way we do have
/arch/mips/cavium-octeon/executive/
Dcvmx-l2c.c317 uint64_t way; in cvmx_l2c_lock_line() local
323 for (way = 0; way < assoc; way++) { in cvmx_l2c_lock_line()
324 CVMX_CACHE_LTGL2I(index | (way << shift), 0); in cvmx_l2c_lock_line()
333 if (way >= assoc) { in cvmx_l2c_lock_line()
343 return way; in cvmx_l2c_lock_line()
/arch/mips/dec/
Dint-handler.S305 move a1,t0 # cheats way of printing an arg!
309 move a1,t0 # cheats way of printing an arg!
/arch/x86/crypto/
DMakefile23 obj-$(CONFIG_CRYPTO_TWOFISH_X86_64_3WAY) += twofish-x86_64-3way.o
67 twofish-x86_64-3way-y := twofish-x86_64-asm_64-3way.o twofish_glue_3way.o
/arch/parisc/math-emu/
DREADME10 in any way. This copy of this snapshot is no longer the property
/arch/score/
DKconfig.debug13 On some platforms, there is currently no way for the boot loader to
/arch/arm/boot/dts/
Dimx6q-tx6q-1110.dts61 * a poor man's way to create a 1:1 relationship between
83 * a poor man's way to create a 1:1 relationship between
Dimx6dl-tx6u-811x.dts61 * a poor man's way to create a 1:1 relationship between
83 * a poor man's way to create a 1:1 relationship between
/arch/ia64/include/asm/
Dpal.h289 way : 8, /* 23-16 way in the set member
302 way : 8, /* 23-16 way in the set member
325 #define pclid_read_way pclid_info_read.way
334 #define pclid_write_way pclid_info_write.way
504 way : 5, /* Way in which the member
639 way : 6, /* Way of structure */ member
724 #define pmci_cache_way pme_cache.way
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
Dl2cache_defs.h107 unsigned int way : 3; member

12345