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1 /*
2  * AD5686R, AD5685R, AD5684R Digital to analog converters  driver
3  *
4  * Copyright 2011 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8 
9 #include <linux/interrupt.h>
10 #include <linux/fs.h>
11 #include <linux/device.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
18 
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 
22 #define AD5686_DAC_CHANNELS			4
23 
24 #define AD5686_ADDR(x)				((x) << 16)
25 #define AD5686_CMD(x)				((x) << 20)
26 
27 #define AD5686_ADDR_DAC(chan)		(0x1 << (chan))
28 #define AD5686_ADDR_ALL_DAC			0xF
29 
30 #define AD5686_CMD_NOOP				0x0
31 #define AD5686_CMD_WRITE_INPUT_N		0x1
32 #define AD5686_CMD_UPDATE_DAC_N			0x2
33 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N	0x3
34 #define AD5686_CMD_POWERDOWN_DAC		0x4
35 #define AD5686_CMD_LDAC_MASK			0x5
36 #define AD5686_CMD_RESET			0x6
37 #define AD5686_CMD_INTERNAL_REFER_SETUP		0x7
38 #define AD5686_CMD_DAISY_CHAIN_ENABLE		0x8
39 #define AD5686_CMD_READBACK_ENABLE		0x9
40 
41 #define AD5686_LDAC_PWRDN_NONE			0x0
42 #define AD5686_LDAC_PWRDN_1K			0x1
43 #define AD5686_LDAC_PWRDN_100K			0x2
44 #define AD5686_LDAC_PWRDN_3STATE		0x3
45 
46 /**
47  * struct ad5686_chip_info - chip specific information
48  * @int_vref_mv:	AD5620/40/60: the internal reference voltage
49  * @channel:		channel specification
50 */
51 
52 struct ad5686_chip_info {
53 	u16				int_vref_mv;
54 	struct iio_chan_spec		channel[AD5686_DAC_CHANNELS];
55 };
56 
57 /**
58  * struct ad5446_state - driver instance specific data
59  * @spi:		spi_device
60  * @chip_info:		chip model specific constants, available modes etc
61  * @reg:		supply regulator
62  * @vref_mv:		actual reference voltage used
63  * @pwr_down_mask:	power down mask
64  * @pwr_down_mode:	current power down mode
65  * @data:		spi transfer buffers
66  */
67 
68 struct ad5686_state {
69 	struct spi_device		*spi;
70 	const struct ad5686_chip_info	*chip_info;
71 	struct regulator		*reg;
72 	unsigned short			vref_mv;
73 	unsigned			pwr_down_mask;
74 	unsigned			pwr_down_mode;
75 	/*
76 	 * DMA (thus cache coherency maintenance) requires the
77 	 * transfer buffers to live in their own cache lines.
78 	 */
79 
80 	union {
81 		__be32 d32;
82 		u8 d8[4];
83 	} data[3] ____cacheline_aligned;
84 };
85 
86 /**
87  * ad5686_supported_device_ids:
88  */
89 
90 enum ad5686_supported_device_ids {
91 	ID_AD5684,
92 	ID_AD5685,
93 	ID_AD5686,
94 };
ad5686_spi_write(struct ad5686_state * st,u8 cmd,u8 addr,u16 val,u8 shift)95 static int ad5686_spi_write(struct ad5686_state *st,
96 			     u8 cmd, u8 addr, u16 val, u8 shift)
97 {
98 	val <<= shift;
99 
100 	st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
101 			      AD5686_ADDR(addr) |
102 			      val);
103 
104 	return spi_write(st->spi, &st->data[0].d8[1], 3);
105 }
106 
ad5686_spi_read(struct ad5686_state * st,u8 addr)107 static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
108 {
109 	struct spi_transfer t[] = {
110 		{
111 			.tx_buf = &st->data[0].d8[1],
112 			.len = 3,
113 			.cs_change = 1,
114 		}, {
115 			.tx_buf = &st->data[1].d8[1],
116 			.rx_buf = &st->data[2].d8[1],
117 			.len = 3,
118 		},
119 	};
120 	int ret;
121 
122 	st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
123 			      AD5686_ADDR(addr));
124 	st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
125 
126 	ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
127 	if (ret < 0)
128 		return ret;
129 
130 	return be32_to_cpu(st->data[2].d32);
131 }
132 
133 static const char * const ad5686_powerdown_modes[] = {
134 	"1kohm_to_gnd",
135 	"100kohm_to_gnd",
136 	"three_state"
137 };
138 
ad5686_get_powerdown_mode(struct iio_dev * indio_dev,const struct iio_chan_spec * chan)139 static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
140 	const struct iio_chan_spec *chan)
141 {
142 	struct ad5686_state *st = iio_priv(indio_dev);
143 
144 	return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
145 }
146 
ad5686_set_powerdown_mode(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,unsigned int mode)147 static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
148 	const struct iio_chan_spec *chan, unsigned int mode)
149 {
150 	struct ad5686_state *st = iio_priv(indio_dev);
151 
152 	st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
153 	st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
154 
155 	return 0;
156 }
157 
158 static const struct iio_enum ad5686_powerdown_mode_enum = {
159 	.items = ad5686_powerdown_modes,
160 	.num_items = ARRAY_SIZE(ad5686_powerdown_modes),
161 	.get = ad5686_get_powerdown_mode,
162 	.set = ad5686_set_powerdown_mode,
163 };
164 
ad5686_read_dac_powerdown(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)165 static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
166 	uintptr_t private, const struct iio_chan_spec *chan, char *buf)
167 {
168 	struct ad5686_state *st = iio_priv(indio_dev);
169 
170 	return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
171 			(0x3 << (chan->channel * 2))));
172 }
173 
ad5686_write_dac_powerdown(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)174 static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
175 	 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
176 	 size_t len)
177 {
178 	bool readin;
179 	int ret;
180 	struct ad5686_state *st = iio_priv(indio_dev);
181 
182 	ret = strtobool(buf, &readin);
183 	if (ret)
184 		return ret;
185 
186 	if (readin)
187 		st->pwr_down_mask |= (0x3 << (chan->channel * 2));
188 	else
189 		st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
190 
191 	ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
192 			       st->pwr_down_mask & st->pwr_down_mode, 0);
193 
194 	return ret ? ret : len;
195 }
196 
ad5686_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)197 static int ad5686_read_raw(struct iio_dev *indio_dev,
198 			   struct iio_chan_spec const *chan,
199 			   int *val,
200 			   int *val2,
201 			   long m)
202 {
203 	struct ad5686_state *st = iio_priv(indio_dev);
204 	int ret;
205 
206 	switch (m) {
207 	case IIO_CHAN_INFO_RAW:
208 		mutex_lock(&indio_dev->mlock);
209 		ret = ad5686_spi_read(st, chan->address);
210 		mutex_unlock(&indio_dev->mlock);
211 		if (ret < 0)
212 			return ret;
213 		*val = ret;
214 		return IIO_VAL_INT;
215 	case IIO_CHAN_INFO_SCALE:
216 		*val = st->vref_mv;
217 		*val2 = chan->scan_type.realbits;
218 		return IIO_VAL_FRACTIONAL_LOG2;
219 	}
220 	return -EINVAL;
221 }
222 
ad5686_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)223 static int ad5686_write_raw(struct iio_dev *indio_dev,
224 			       struct iio_chan_spec const *chan,
225 			       int val,
226 			       int val2,
227 			       long mask)
228 {
229 	struct ad5686_state *st = iio_priv(indio_dev);
230 	int ret;
231 
232 	switch (mask) {
233 	case IIO_CHAN_INFO_RAW:
234 		if (val > (1 << chan->scan_type.realbits) || val < 0)
235 			return -EINVAL;
236 
237 		mutex_lock(&indio_dev->mlock);
238 		ret = ad5686_spi_write(st,
239 				 AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
240 				 chan->address,
241 				 val,
242 				 chan->scan_type.shift);
243 		mutex_unlock(&indio_dev->mlock);
244 		break;
245 	default:
246 		ret = -EINVAL;
247 	}
248 
249 	return ret;
250 }
251 
252 static const struct iio_info ad5686_info = {
253 	.read_raw = ad5686_read_raw,
254 	.write_raw = ad5686_write_raw,
255 	.driver_module = THIS_MODULE,
256 };
257 
258 static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
259 	{
260 		.name = "powerdown",
261 		.read = ad5686_read_dac_powerdown,
262 		.write = ad5686_write_dac_powerdown,
263 		.shared = IIO_SEPARATE,
264 	},
265 	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5686_powerdown_mode_enum),
266 	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
267 	{ },
268 };
269 
270 #define AD5868_CHANNEL(chan, bits, _shift) {			\
271 		.type = IIO_VOLTAGE,				\
272 		.indexed = 1,					\
273 		.output = 1,					\
274 		.channel = chan,				\
275 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
276 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
277 		.address = AD5686_ADDR_DAC(chan),		\
278 		.scan_type = {					\
279 			.sign = 'u',				\
280 			.realbits = (bits),			\
281 			.storagebits = 16,			\
282 			.shift = (_shift),			\
283 		},						\
284 		.ext_info = ad5686_ext_info,			\
285 }
286 
287 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
288 	[ID_AD5684] = {
289 		.channel[0] = AD5868_CHANNEL(0, 12, 4),
290 		.channel[1] = AD5868_CHANNEL(1, 12, 4),
291 		.channel[2] = AD5868_CHANNEL(2, 12, 4),
292 		.channel[3] = AD5868_CHANNEL(3, 12, 4),
293 		.int_vref_mv = 2500,
294 	},
295 	[ID_AD5685] = {
296 		.channel[0] = AD5868_CHANNEL(0, 14, 2),
297 		.channel[1] = AD5868_CHANNEL(1, 14, 2),
298 		.channel[2] = AD5868_CHANNEL(2, 14, 2),
299 		.channel[3] = AD5868_CHANNEL(3, 14, 2),
300 		.int_vref_mv = 2500,
301 	},
302 	[ID_AD5686] = {
303 		.channel[0] = AD5868_CHANNEL(0, 16, 0),
304 		.channel[1] = AD5868_CHANNEL(1, 16, 0),
305 		.channel[2] = AD5868_CHANNEL(2, 16, 0),
306 		.channel[3] = AD5868_CHANNEL(3, 16, 0),
307 		.int_vref_mv = 2500,
308 	},
309 };
310 
311 
ad5686_probe(struct spi_device * spi)312 static int ad5686_probe(struct spi_device *spi)
313 {
314 	struct ad5686_state *st;
315 	struct iio_dev *indio_dev;
316 	int ret, voltage_uv = 0;
317 
318 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
319 	if (indio_dev == NULL)
320 		return  -ENOMEM;
321 
322 	st = iio_priv(indio_dev);
323 	spi_set_drvdata(spi, indio_dev);
324 
325 	st->reg = devm_regulator_get_optional(&spi->dev, "vcc");
326 	if (!IS_ERR(st->reg)) {
327 		ret = regulator_enable(st->reg);
328 		if (ret)
329 			return ret;
330 
331 		ret = regulator_get_voltage(st->reg);
332 		if (ret < 0)
333 			goto error_disable_reg;
334 
335 		voltage_uv = ret;
336 	}
337 
338 	st->chip_info =
339 		&ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
340 
341 	if (voltage_uv)
342 		st->vref_mv = voltage_uv / 1000;
343 	else
344 		st->vref_mv = st->chip_info->int_vref_mv;
345 
346 	st->spi = spi;
347 
348 	/* Set all the power down mode for all channels to 1K pulldown */
349 	st->pwr_down_mode = 0x55;
350 
351 	indio_dev->dev.parent = &spi->dev;
352 	indio_dev->name = spi_get_device_id(spi)->name;
353 	indio_dev->info = &ad5686_info;
354 	indio_dev->modes = INDIO_DIRECT_MODE;
355 	indio_dev->channels = st->chip_info->channel;
356 	indio_dev->num_channels = AD5686_DAC_CHANNELS;
357 
358 	ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
359 				!!voltage_uv, 0);
360 	if (ret)
361 		goto error_disable_reg;
362 
363 	ret = iio_device_register(indio_dev);
364 	if (ret)
365 		goto error_disable_reg;
366 
367 	return 0;
368 
369 error_disable_reg:
370 	if (!IS_ERR(st->reg))
371 		regulator_disable(st->reg);
372 	return ret;
373 }
374 
ad5686_remove(struct spi_device * spi)375 static int ad5686_remove(struct spi_device *spi)
376 {
377 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
378 	struct ad5686_state *st = iio_priv(indio_dev);
379 
380 	iio_device_unregister(indio_dev);
381 	if (!IS_ERR(st->reg))
382 		regulator_disable(st->reg);
383 
384 	return 0;
385 }
386 
387 static const struct spi_device_id ad5686_id[] = {
388 	{"ad5684", ID_AD5684},
389 	{"ad5685", ID_AD5685},
390 	{"ad5686", ID_AD5686},
391 	{}
392 };
393 MODULE_DEVICE_TABLE(spi, ad5686_id);
394 
395 static struct spi_driver ad5686_driver = {
396 	.driver = {
397 		   .name = "ad5686",
398 		   },
399 	.probe = ad5686_probe,
400 	.remove = ad5686_remove,
401 	.id_table = ad5686_id,
402 };
403 module_spi_driver(ad5686_driver);
404 
405 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
406 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
407 MODULE_LICENSE("GPL v2");
408