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Searched refs:ARRAY_1D_TILED_THIN1 (Results 1 – 25 of 37) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
Dgfx_v8_0.c2169 modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2179 modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2191 modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2239 modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2340 modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2354 modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2370 modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2426 modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2529 modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
2543 modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v8_0_tiling_mode_table_init()
[all …]
Dgfx_v7_0.c1073 tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1083 tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1095 tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1143 tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1240 tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1254 tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1269 tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1323 tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1426 tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1436 tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
[all …]
Dgfx_v6_0.c448 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
498 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
538 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
688 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
738 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
778 gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
/drivers/gpu/drm/radeon/
Dcik.c2405 tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2418 tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2433 tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2448 tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2548 tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2561 tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2576 tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2591 tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2692 tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
2705 tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in cik_tiling_mode_table_init()
[all …]
Devergreen_cs.c97 return ARRAY_1D_TILED_THIN1; in evergreen_cs_get_aray_mode()
308 case ARRAY_1D_TILED_THIN1: in evergreen_surface_check()
329 case ARRAY_1D_TILED_THIN1: in evergreen_surface_value_conv_check()
884 surf.mode = ARRAY_1D_TILED_THIN1; in evergreen_cs_track_validate_texture()
891 case ARRAY_1D_TILED_THIN1: in evergreen_cs_track_validate_texture()
Dsi.c2548 tile[4] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in si_tiling_mode_table_init()
2593 tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in si_tiling_mode_table_init()
2629 tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in si_tiling_mode_table_init()
2763 tile[4] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in si_tiling_mode_table_init()
2808 tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in si_tiling_mode_table_init()
2844 tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in si_tiling_mode_table_init()
Dsid.h1183 # define ARRAY_1D_TILED_THIN1 2 macro
Dcikd.h1223 # define ARRAY_1D_TILED_THIN1 2 macro
/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_8_2_enum.h526 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Dgmc_8_1_enum.h36 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_1_enum.h526 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Dbif_5_0_enum.h36 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_8_0_enum.h526 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Dsmu_7_1_0_enum.h79 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Dsmu_7_1_1_enum.h86 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Dsmu_7_1_2_enum.h86 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Dsmu_7_1_3_enum.h83 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_enum.h36 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Ddce_10_0_enum.h611 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_6_0_enum.h539 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Duvd_5_0_enum.h49 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_enum.h221 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Doss_3_0_1_enum.h922 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
Doss_3_0_enum.h335 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1181 # define ARRAY_1D_TILED_THIN1 2 macro

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