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Searched refs:CPL_RX_PHYS_DSGL_ISRDMA_V (Results 1 – 2 of 2) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb4/
Dt4_msg.h1784 #define CPL_RX_PHYS_DSGL_ISRDMA_V(x) ((x) << CPL_RX_PHYS_DSGL_ISRDMA_S) macro
1787 #define CPL_RX_PHYS_DSGL_ISRDMA_F CPL_RX_PHYS_DSGL_ISRDMA_V(1U)
/drivers/crypto/chelsio/
Dchcr_algo.c309 | CPL_RX_PHYS_DSGL_ISRDMA_V(0)); in write_phys_cpl()