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Searched refs:CP_PFP_UCODE_ADDR (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770.c1110 WREG32(CP_PFP_UCODE_ADDR, 0); in rv770_cp_load_microcode()
1113 WREG32(CP_PFP_UCODE_ADDR, 0); in rv770_cp_load_microcode()
1120 WREG32(CP_PFP_UCODE_ADDR, 0); in rv770_cp_load_microcode()
Dni.c1538 WREG32(CP_PFP_UCODE_ADDR, 0); in cayman_cp_load_microcode()
1541 WREG32(CP_PFP_UCODE_ADDR, 0); in cayman_cp_load_microcode()
1548 WREG32(CP_PFP_UCODE_ADDR, 0); in cayman_cp_load_microcode()
Drv770d.h344 #define CP_PFP_UCODE_ADDR 0xC150 macro
Dnid.h509 #define CP_PFP_UCODE_ADDR 0xC150 macro
Dsid.h1257 #define CP_PFP_UCODE_ADDR 0xC150 macro
Dsi.c3499 WREG32(CP_PFP_UCODE_ADDR, 0); in si_cp_load_microcode()
3502 WREG32(CP_PFP_UCODE_ADDR, 0); in si_cp_load_microcode()
3526 WREG32(CP_PFP_UCODE_ADDR, 0); in si_cp_load_microcode()
3529 WREG32(CP_PFP_UCODE_ADDR, 0); in si_cp_load_microcode()
3546 WREG32(CP_PFP_UCODE_ADDR, 0); in si_cp_load_microcode()
Dcikd.h1320 #define CP_PFP_UCODE_ADDR 0xC150 macro
Devergreen.c3074 WREG32(CP_PFP_UCODE_ADDR, 0); in evergreen_cp_load_microcode()
3077 WREG32(CP_PFP_UCODE_ADDR, 0); in evergreen_cp_load_microcode()
3084 WREG32(CP_PFP_UCODE_ADDR, 0); in evergreen_cp_load_microcode()
Devergreend.h470 #define CP_PFP_UCODE_ADDR 0xC150 macro
Dcik.c3951 WREG32(CP_PFP_UCODE_ADDR, 0); in cik_cp_gfx_load_microcode()
3954 WREG32(CP_PFP_UCODE_ADDR, le32_to_cpu(pfp_hdr->header.ucode_version)); in cik_cp_gfx_load_microcode()
3979 WREG32(CP_PFP_UCODE_ADDR, 0); in cik_cp_gfx_load_microcode()
3982 WREG32(CP_PFP_UCODE_ADDR, 0); in cik_cp_gfx_load_microcode()
Dr600d.h189 #define CP_PFP_UCODE_ADDR 0xC150 macro
Dr600.c2675 WREG32(CP_PFP_UCODE_ADDR, 0); in r600_cp_load_microcode()
2680 WREG32(CP_PFP_UCODE_ADDR, 0); in r600_cp_load_microcode()
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c1619 WREG32(CP_PFP_UCODE_ADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
1622 WREG32(CP_PFP_UCODE_ADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
1643 WREG32(CP_PFP_UCODE_ADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1286 #define CP_PFP_UCODE_ADDR 0x3054 macro