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Searched refs:DCIO_GSL0_TIMING_SYNC_SEL_SWAPLOCK_A (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_enum.h308 DCIO_GSL0_TIMING_SYNC_SEL_SWAPLOCK_A = 0x3, enumerator
Ddce_11_0_enum.h1077 DCIO_GSL0_TIMING_SYNC_SEL_SWAPLOCK_A = 0x3, enumerator
Ddce_11_2_enum.h1476 DCIO_GSL0_TIMING_SYNC_SEL_SWAPLOCK_A = 0x3, enumerator