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Searched refs:DCIO_GSL2_TIMING_SYNC_SEL_GENCLK_CLK (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_enum.h335 DCIO_GSL2_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator
Ddce_11_0_enum.h1104 DCIO_GSL2_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator
Ddce_11_2_enum.h1503 DCIO_GSL2_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator