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Searched refs:DCIO_GSL_VSYNC_SEL_PIPE1 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_enum.h298 DCIO_GSL_VSYNC_SEL_PIPE1 = 0x1, enumerator
Ddce_11_0_enum.h1067 DCIO_GSL_VSYNC_SEL_PIPE1 = 0x1, enumerator
Ddce_11_2_enum.h1466 DCIO_GSL_VSYNC_SEL_PIPE1 = 0x1, enumerator