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Searched refs:DC_HPD2_INT_CONTROL (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Devergreen.c1775 tmp = RREG32(DC_HPD2_INT_CONTROL); in evergreen_hpd_set_polarity()
1780 WREG32(DC_HPD2_INT_CONTROL, tmp); in evergreen_hpd_set_polarity()
4596 tmp = RREG32(DC_HPD2_INT_CONTROL) & DC_HPDx_INT_POLARITY; in evergreen_disable_interrupt_state()
4597 WREG32(DC_HPD2_INT_CONTROL, tmp); in evergreen_disable_interrupt_state()
4633 hpd2 = RREG32(DC_HPD2_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in evergreen_irq_set()
4816 WREG32(DC_HPD2_INT_CONTROL, hpd2); in evergreen_irq_set()
4916 tmp = RREG32(DC_HPD2_INT_CONTROL); in evergreen_irq_ack()
4918 WREG32(DC_HPD2_INT_CONTROL, tmp); in evergreen_irq_ack()
4947 tmp = RREG32(DC_HPD2_INT_CONTROL); in evergreen_irq_ack()
4949 WREG32(DC_HPD2_INT_CONTROL, tmp); in evergreen_irq_ack()
Dr600.c870 tmp = RREG32(DC_HPD2_INT_CONTROL); in r600_hpd_set_polarity()
875 WREG32(DC_HPD2_INT_CONTROL, tmp); in r600_hpd_set_polarity()
3638 tmp = RREG32(DC_HPD2_INT_CONTROL) & DC_HPDx_INT_POLARITY; in r600_disable_interrupt_state()
3639 WREG32(DC_HPD2_INT_CONTROL, tmp); in r600_disable_interrupt_state()
3789 hpd2 = RREG32(DC_HPD2_INT_CONTROL) & ~DC_HPDx_INT_EN; in r600_irq_set()
3885 WREG32(DC_HPD2_INT_CONTROL, hpd2); in r600_irq_set()
3966 tmp = RREG32(DC_HPD2_INT_CONTROL); in r600_irq_ack()
3968 WREG32(DC_HPD2_INT_CONTROL, tmp); in r600_irq_ack()
Dsi.c5986 tmp = RREG32(DC_HPD2_INT_CONTROL) & DC_HPDx_INT_POLARITY; in si_disable_interrupt_state()
5987 WREG32(DC_HPD2_INT_CONTROL, tmp); in si_disable_interrupt_state()
6097 hpd2 = RREG32(DC_HPD2_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in si_irq_set()
6235 WREG32(DC_HPD2_INT_CONTROL, hpd2); in si_irq_set()
6323 tmp = RREG32(DC_HPD2_INT_CONTROL); in si_irq_ack()
6325 WREG32(DC_HPD2_INT_CONTROL, tmp); in si_irq_ack()
6354 tmp = RREG32(DC_HPD2_INT_CONTROL); in si_irq_ack()
6356 WREG32(DC_HPD2_INT_CONTROL, tmp); in si_irq_ack()
Dcik.c6983 tmp = RREG32(DC_HPD2_INT_CONTROL) & DC_HPDx_INT_POLARITY; in cik_disable_interrupt_state()
6984 WREG32(DC_HPD2_INT_CONTROL, tmp); in cik_disable_interrupt_state()
7113 hpd2 = RREG32(DC_HPD2_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in cik_irq_set()
7267 WREG32(DC_HPD2_INT_CONTROL, hpd2); in cik_irq_set()
7372 tmp = RREG32(DC_HPD2_INT_CONTROL); in cik_irq_ack()
7374 WREG32(DC_HPD2_INT_CONTROL, tmp); in cik_irq_ack()
7402 tmp = RREG32(DC_HPD2_INT_CONTROL); in cik_irq_ack()
7404 WREG32(DC_HPD2_INT_CONTROL, tmp); in cik_irq_ack()
Dsid.h881 #define DC_HPD2_INT_CONTROL 0x602c macro
Dcikd.h957 #define DC_HPD2_INT_CONTROL 0x602c macro
Devergreend.h1347 #define DC_HPD2_INT_CONTROL 0x602c macro
Dr600d.h857 #define DC_HPD2_INT_CONTROL 0x7d10 macro
/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c99 DC_HPD2_INT_CONTROL,
316 tmp = RREG32(DC_HPD2_INT_CONTROL); in dce_v6_0_hpd_set_polarity()
321 WREG32(DC_HPD2_INT_CONTROL, tmp); in dce_v6_0_hpd_set_polarity()
415 dc_hpd_int_cntl_reg = DC_HPD2_INT_CONTROL; in dce_v6_0_hpd_init()
2589 dc_hpd_int_cntl_reg = DC_HPD2_INT_CONTROL; in dce_v6_0_set_hpd_interrupt_state()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h885 #define DC_HPD2_INT_CONTROL 0x180B macro