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Searched refs:DC_HPD4_INT_CONTROL (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Devergreen.c1791 tmp = RREG32(DC_HPD4_INT_CONTROL); in evergreen_hpd_set_polarity()
1796 WREG32(DC_HPD4_INT_CONTROL, tmp); in evergreen_hpd_set_polarity()
4600 tmp = RREG32(DC_HPD4_INT_CONTROL) & DC_HPDx_INT_POLARITY; in evergreen_disable_interrupt_state()
4601 WREG32(DC_HPD4_INT_CONTROL, tmp); in evergreen_disable_interrupt_state()
4635 hpd4 = RREG32(DC_HPD4_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in evergreen_irq_set()
4818 WREG32(DC_HPD4_INT_CONTROL, hpd4); in evergreen_irq_set()
4926 tmp = RREG32(DC_HPD4_INT_CONTROL); in evergreen_irq_ack()
4928 WREG32(DC_HPD4_INT_CONTROL, tmp); in evergreen_irq_ack()
4957 tmp = RREG32(DC_HPD4_INT_CONTROL); in evergreen_irq_ack()
4959 WREG32(DC_HPD4_INT_CONTROL, tmp); in evergreen_irq_ack()
Dr600.c886 tmp = RREG32(DC_HPD4_INT_CONTROL); in r600_hpd_set_polarity()
891 WREG32(DC_HPD4_INT_CONTROL, tmp); in r600_hpd_set_polarity()
3642 tmp = RREG32(DC_HPD4_INT_CONTROL) & DC_HPDx_INT_POLARITY; in r600_disable_interrupt_state()
3643 WREG32(DC_HPD4_INT_CONTROL, tmp); in r600_disable_interrupt_state()
3791 hpd4 = RREG32(DC_HPD4_INT_CONTROL) & ~DC_HPDx_INT_EN; in r600_irq_set()
3887 WREG32(DC_HPD4_INT_CONTROL, hpd4); in r600_irq_set()
3987 tmp = RREG32(DC_HPD4_INT_CONTROL); in r600_irq_ack()
3989 WREG32(DC_HPD4_INT_CONTROL, tmp); in r600_irq_ack()
Dsi.c5990 tmp = RREG32(DC_HPD4_INT_CONTROL) & DC_HPDx_INT_POLARITY; in si_disable_interrupt_state()
5991 WREG32(DC_HPD4_INT_CONTROL, tmp); in si_disable_interrupt_state()
6099 hpd4 = RREG32(DC_HPD4_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in si_irq_set()
6237 WREG32(DC_HPD4_INT_CONTROL, hpd4); in si_irq_set()
6333 tmp = RREG32(DC_HPD4_INT_CONTROL); in si_irq_ack()
6335 WREG32(DC_HPD4_INT_CONTROL, tmp); in si_irq_ack()
6364 tmp = RREG32(DC_HPD4_INT_CONTROL); in si_irq_ack()
6366 WREG32(DC_HPD4_INT_CONTROL, tmp); in si_irq_ack()
Dcik.c6987 tmp = RREG32(DC_HPD4_INT_CONTROL) & DC_HPDx_INT_POLARITY; in cik_disable_interrupt_state()
6988 WREG32(DC_HPD4_INT_CONTROL, tmp); in cik_disable_interrupt_state()
7115 hpd4 = RREG32(DC_HPD4_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in cik_irq_set()
7269 WREG32(DC_HPD4_INT_CONTROL, hpd4); in cik_irq_set()
7382 tmp = RREG32(DC_HPD4_INT_CONTROL); in cik_irq_ack()
7384 WREG32(DC_HPD4_INT_CONTROL, tmp); in cik_irq_ack()
7412 tmp = RREG32(DC_HPD4_INT_CONTROL); in cik_irq_ack()
7414 WREG32(DC_HPD4_INT_CONTROL, tmp); in cik_irq_ack()
Dsid.h883 #define DC_HPD4_INT_CONTROL 0x6044 macro
Dcikd.h959 #define DC_HPD4_INT_CONTROL 0x6044 macro
Devergreend.h1349 #define DC_HPD4_INT_CONTROL 0x6044 macro
Dr600d.h859 #define DC_HPD4_INT_CONTROL 0x7d28 macro
/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c101 DC_HPD4_INT_CONTROL,
332 tmp = RREG32(DC_HPD4_INT_CONTROL); in dce_v6_0_hpd_set_polarity()
337 WREG32(DC_HPD4_INT_CONTROL, tmp); in dce_v6_0_hpd_set_polarity()
421 dc_hpd_int_cntl_reg = DC_HPD4_INT_CONTROL; in dce_v6_0_hpd_init()
2595 dc_hpd_int_cntl_reg = DC_HPD4_INT_CONTROL; in dce_v6_0_set_hpd_interrupt_state()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h887 #define DC_HPD4_INT_CONTROL 0x1811 macro