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Searched refs:DC_HPD6_INT_CONTROL (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Devergreen.c1807 tmp = RREG32(DC_HPD6_INT_CONTROL); in evergreen_hpd_set_polarity()
1812 WREG32(DC_HPD6_INT_CONTROL, tmp); in evergreen_hpd_set_polarity()
4604 tmp = RREG32(DC_HPD6_INT_CONTROL) & DC_HPDx_INT_POLARITY; in evergreen_disable_interrupt_state()
4605 WREG32(DC_HPD6_INT_CONTROL, tmp); in evergreen_disable_interrupt_state()
4637 hpd6 = RREG32(DC_HPD6_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in evergreen_irq_set()
4820 WREG32(DC_HPD6_INT_CONTROL, hpd6); in evergreen_irq_set()
4936 tmp = RREG32(DC_HPD6_INT_CONTROL); in evergreen_irq_ack()
4938 WREG32(DC_HPD6_INT_CONTROL, tmp); in evergreen_irq_ack()
4967 tmp = RREG32(DC_HPD6_INT_CONTROL); in evergreen_irq_ack()
4969 WREG32(DC_HPD6_INT_CONTROL, tmp); in evergreen_irq_ack()
Dr600.c903 tmp = RREG32(DC_HPD6_INT_CONTROL); in r600_hpd_set_polarity()
908 WREG32(DC_HPD6_INT_CONTROL, tmp); in r600_hpd_set_polarity()
3647 tmp = RREG32(DC_HPD6_INT_CONTROL) & DC_HPDx_INT_POLARITY; in r600_disable_interrupt_state()
3648 WREG32(DC_HPD6_INT_CONTROL, tmp); in r600_disable_interrupt_state()
3794 hpd6 = RREG32(DC_HPD6_INT_CONTROL) & ~DC_HPDx_INT_EN; in r600_irq_set()
3890 WREG32(DC_HPD6_INT_CONTROL, hpd6); in r600_irq_set()
3998 tmp = RREG32(DC_HPD6_INT_CONTROL); in r600_irq_ack()
4000 WREG32(DC_HPD6_INT_CONTROL, tmp); in r600_irq_ack()
Dsi.c5994 tmp = RREG32(DC_HPD6_INT_CONTROL) & DC_HPDx_INT_POLARITY; in si_disable_interrupt_state()
5995 WREG32(DC_HPD6_INT_CONTROL, tmp); in si_disable_interrupt_state()
6101 hpd6 = RREG32(DC_HPD6_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in si_irq_set()
6239 WREG32(DC_HPD6_INT_CONTROL, hpd6); in si_irq_set()
6343 tmp = RREG32(DC_HPD6_INT_CONTROL); in si_irq_ack()
6345 WREG32(DC_HPD6_INT_CONTROL, tmp); in si_irq_ack()
6374 tmp = RREG32(DC_HPD6_INT_CONTROL); in si_irq_ack()
6376 WREG32(DC_HPD6_INT_CONTROL, tmp); in si_irq_ack()
Dcik.c6991 tmp = RREG32(DC_HPD6_INT_CONTROL) & DC_HPDx_INT_POLARITY; in cik_disable_interrupt_state()
6992 WREG32(DC_HPD6_INT_CONTROL, tmp); in cik_disable_interrupt_state()
7117 hpd6 = RREG32(DC_HPD6_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in cik_irq_set()
7271 WREG32(DC_HPD6_INT_CONTROL, hpd6); in cik_irq_set()
7392 tmp = RREG32(DC_HPD6_INT_CONTROL); in cik_irq_ack()
7394 WREG32(DC_HPD6_INT_CONTROL, tmp); in cik_irq_ack()
7422 tmp = RREG32(DC_HPD6_INT_CONTROL); in cik_irq_ack()
7424 WREG32(DC_HPD6_INT_CONTROL, tmp); in cik_irq_ack()
Dsid.h885 #define DC_HPD6_INT_CONTROL 0x605c macro
Dcikd.h961 #define DC_HPD6_INT_CONTROL 0x605c macro
Devergreend.h1351 #define DC_HPD6_INT_CONTROL 0x605c macro
Dr600d.h862 #define DC_HPD6_INT_CONTROL 0x7df8 macro
/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c103 DC_HPD6_INT_CONTROL,
348 tmp = RREG32(DC_HPD6_INT_CONTROL); in dce_v6_0_hpd_set_polarity()
353 WREG32(DC_HPD6_INT_CONTROL, tmp); in dce_v6_0_hpd_set_polarity()
427 dc_hpd_int_cntl_reg = DC_HPD6_INT_CONTROL; in dce_v6_0_hpd_init()
2601 dc_hpd_int_cntl_reg = DC_HPD6_INT_CONTROL; in dce_v6_0_set_hpd_interrupt_state()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h889 #define DC_HPD6_INT_CONTROL 0x1817 macro