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Searched refs:DMA_CNTL (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dsi_dma.c182 dma_cntl = RREG32(DMA_CNTL + sdma_offsets[i]); in si_dma_start()
184 WREG32(DMA_CNTL + sdma_offsets[i], dma_cntl); in si_dma_start()
644 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
646 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
649 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
651 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
660 sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
662 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
665 sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
667 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
/drivers/gpu/drm/radeon/
Dni_dma.c239 dma_cntl = RREG32(DMA_CNTL + reg_offset); in cayman_dma_resume()
241 WREG32(DMA_CNTL + reg_offset, dma_cntl); in cayman_dma_resume()
Dr600_dma.c160 dma_cntl = RREG32(DMA_CNTL); in r600_dma_resume()
162 WREG32(DMA_CNTL, dma_cntl); in r600_dma_resume()
Dsi.c5949 tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5950 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, tmp); in si_disable_interrupt_state()
5951 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5952 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp); in si_disable_interrupt_state()
6104 dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6105 dma_cntl1 = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6191 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, dma_cntl); in si_irq_set()
6192 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, dma_cntl1); in si_irq_set()
Dnid.h1323 #define DMA_CNTL 0xd02c macro
Dr600.c3627 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_disable_interrupt_state()
3628 WREG32(DMA_CNTL, tmp); in r600_disable_interrupt_state()
3809 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_irq_set()
3878 WREG32(DMA_CNTL, dma_cntl); in r600_irq_set()
Dsid.h1833 #define DMA_CNTL 0xd02c macro
Devergreen.c4563 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4564 WREG32(DMA_CNTL, tmp); in evergreen_disable_interrupt_state()
4652 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4780 WREG32(DMA_CNTL, dma_cntl); in evergreen_irq_set()
Devergreend.h1404 #define DMA_CNTL 0xd02c macro
Dr600d.h631 #define DMA_CNTL 0xd02c macro
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1897 #define DMA_CNTL 0x340b macro