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Searched refs:DMA_STATUS_REG (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/radeon/
Dni.c875 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in cayman_get_allowed_info_register()
876 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in cayman_get_allowed_info_register()
1773 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
1778 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
Dnid.h1330 #define DMA_STATUS_REG 0xd034 macro
Dsid.h1840 #define DMA_STATUS_REG 0xd034 macro
Devergreen.c1097 case DMA_STATUS_REG: in evergreen_get_allowed_info_register()
3882 RREG32(DMA_STATUS_REG)); in evergreen_print_gpu_status_regs()
3885 RREG32(DMA_STATUS_REG + 0x800)); in evergreen_print_gpu_status_regs()
3940 tmp = RREG32(DMA_STATUS_REG); in evergreen_gpu_check_soft_reset()
Dr600.c175 case DMA_STATUS_REG: in r600_get_allowed_info_register()
1578 RREG32(DMA_STATUS_REG)); in r600_print_gpu_status_regs()
1641 tmp = RREG32(DMA_STATUS_REG); in r600_gpu_check_soft_reset()
Dsi.c1293 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in si_get_allowed_info_register()
1294 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in si_get_allowed_info_register()
3794 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in si_gpu_check_soft_reset()
3799 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in si_gpu_check_soft_reset()
Devergreend.h2625 #define DMA_STATUS_REG 0xd034 macro
Dr600d.h638 #define DMA_STATUS_REG 0xd034 macro
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1904 #define DMA_STATUS_REG 0x340d macro