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Searched refs:DMA_TILING_CONFIG (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770d.h383 #define DMA_TILING_CONFIG 0x3ec8 macro
Dnid.h1334 #define DMA_TILING_CONFIG 0xd0b8 macro
Dni.c1137 WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); in cayman_gpu_init()
1138 WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); in cayman_gpu_init()
Dsid.h1842 #define DMA_TILING_CONFIG 0xd0b8 macro
Drv770.c1378 WREG32(DMA_TILING_CONFIG, (gb_tiling_config & 0xffff)); in rv770_gpu_init()
Devergreend.h1411 #define DMA_TILING_CONFIG 0xD0B8 macro
Dr600d.h610 #define DMA_TILING_CONFIG 0x3ec4 macro
Dsi.c3274 WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); in si_gpu_init()
3275 WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); in si_gpu_init()
Dr600.c2138 WREG32(DMA_TILING_CONFIG, tiling_config & 0xffff); in r600_gpu_init()
Devergreen.c3594 WREG32(DMA_TILING_CONFIG, gb_addr_config); in evergreen_gpu_init()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1906 #define DMA_TILING_CONFIG 0x342e macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c1307 WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); in gfx_v6_0_gpu_init()
1308 WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); in gfx_v6_0_gpu_init()