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Searched refs:DMA_WRITE (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/savage/
Dsavage_state.c44 DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); in savage_emit_clip_rect_s3d()
46 DMA_WRITE(scstart); in savage_emit_clip_rect_s3d()
47 DMA_WRITE(scend); in savage_emit_clip_rect_s3d()
70 DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); in savage_emit_clip_rect_s4()
72 DMA_WRITE(drawctrl0); in savage_emit_clip_rect_s4()
73 DMA_WRITE(drawctrl1); in savage_emit_clip_rect_s4()
252 DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); in savage_dispatch_state()
818 DMA_WRITE(data->clear1.mask); in savage_dispatch_clear()
831 DMA_WRITE(clear_cmd); in savage_dispatch_clear()
834 DMA_WRITE(dev_priv->front_offset); in savage_dispatch_clear()
[all …]
Dsavage_drv.h462 DMA_WRITE(BCI_CMD_SET_REGISTER | \
470 DMA_WRITE(BCI_CMD_DRAW_PRIM | (type) | (skip) | \
527 #define DMA_WRITE( val ) *dma_ptr++ = (uint32_t)(val) macro
/drivers/gpu/drm/mga/
Dmga_drv.h313 #define DMA_WRITE(offset, val) \ macro
323 DMA_WRITE(0, ((DMAREG(reg0) << 0) | \
327 DMA_WRITE(1, val0); \
328 DMA_WRITE(2, val1); \
329 DMA_WRITE(3, val2); \
330 DMA_WRITE(4, val3); \
/drivers/staging/rts5208/
Drtsx_scsi.h56 #define DMA_WRITE 0x06 macro
Drtsx_scsi.c2542 case DMA_WRITE: in app_cmd()