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Searched refs:EN0_DCFG (Results 1 – 8 of 8) sorted by relevance

/drivers/net/ethernet/8390/
D8390.h178 #define EN0_DCFG EI_SHIFT(0x0e) /* Data configuration reg WR */ macro
Dne2k-pci.c316 {0x49, EN0_DCFG}, /* Set word-wide access. */ in ne2k_pci_init_one()
344 outb(0x49, ioaddr + EN0_DCFG); in ne2k_pci_init_one()
Dne.c375 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in ne_probe1()
405 outb_p(DCR_VAL, ioaddr + EN0_DCFG); in ne_probe1()
Dax88796.c640 ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG); in ax_initial_setup()
706 ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG); in ax_init_dev()
Daxnet_cs.c200 {0x01, EN0_DCFG}, /* Set word-wide access. */ in get_prom()
1634 outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in AX88190_init()
Dpcnet_cs.c332 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in get_prom()
406 outb_p(0x01, ioaddr + EN0_DCFG); /* Set word-wide access. */ in get_ax88190()
Dlib8390.c1019 ei_outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in __NS8390_init()
/drivers/tty/
Dmxser.c1440 #define EN0_DCFG 0x00E /* Data configuration reg WR */ macro