Searched refs:EN0_DCFG (Results 1 – 8 of 8) sorted by relevance
/drivers/net/ethernet/8390/ |
D | 8390.h | 178 #define EN0_DCFG EI_SHIFT(0x0e) /* Data configuration reg WR */ macro
|
D | ne2k-pci.c | 316 {0x49, EN0_DCFG}, /* Set word-wide access. */ in ne2k_pci_init_one() 344 outb(0x49, ioaddr + EN0_DCFG); in ne2k_pci_init_one()
|
D | ne.c | 375 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in ne_probe1() 405 outb_p(DCR_VAL, ioaddr + EN0_DCFG); in ne_probe1()
|
D | ax88796.c | 640 ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG); in ax_initial_setup() 706 ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG); in ax_init_dev()
|
D | axnet_cs.c | 200 {0x01, EN0_DCFG}, /* Set word-wide access. */ in get_prom() 1634 outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in AX88190_init()
|
D | pcnet_cs.c | 332 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in get_prom() 406 outb_p(0x01, ioaddr + EN0_DCFG); /* Set word-wide access. */ in get_ax88190()
|
D | lib8390.c | 1019 ei_outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in __NS8390_init()
|
/drivers/tty/ |
D | mxser.c | 1440 #define EN0_DCFG 0x00E /* Data configuration reg WR */ macro
|