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Searched refs:GENERAL_PWRMGT (Results 1 – 25 of 28) sorted by relevance

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/drivers/gpu/drm/radeon/
Drv770_dpm.c171 if (RREG32(GENERAL_PWRMGT) & GLOBAL_PWRMGT_EN) in rv770_restore_cgcg()
186 WREG32_P(GENERAL_PWRMGT, GLOBAL_PWRMGT_EN, ~GLOBAL_PWRMGT_EN); in rv770_start_dpm()
198 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); in rv770_stop_dpm()
207 if (RREG32(GENERAL_PWRMGT) & GLOBAL_PWRMGT_EN) in rv770_dpm_enabled()
217 WREG32_P(GENERAL_PWRMGT, 0, ~THERMAL_PROTECTION_DIS); in rv770_enable_thermal_protection()
219 WREG32_P(GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, ~THERMAL_PROTECTION_DIS); in rv770_enable_thermal_protection()
224 WREG32_P(GENERAL_PWRMGT, STATIC_PM_EN, ~STATIC_PM_EN); in rv770_enable_acpi_pm()
775 WREG32_P(GENERAL_PWRMGT, BACKBIAS_PAD_EN, ~BACKBIAS_PAD_EN); in rv770_enable_backbias()
777 WREG32_P(GENERAL_PWRMGT, 0, ~(BACKBIAS_VALUE | BACKBIAS_PAD_EN)); in rv770_enable_backbias()
787 WREG32_P(GENERAL_PWRMGT, DYN_SPREAD_SPECTRUM_EN, ~DYN_SPREAD_SPECTRUM_EN); in rv770_enable_spread_spectrum()
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Drv6xx_dpm.c365 WREG32_P(GENERAL_PWRMGT, DYN_SPREAD_SPECTRUM_EN, ~DYN_SPREAD_SPECTRUM_EN); in rv6xx_enable_dynamic_spread_spectrum()
367 WREG32_P(GENERAL_PWRMGT, 0, ~DYN_SPREAD_SPECTRUM_EN); in rv6xx_enable_dynamic_spread_spectrum()
1174 WREG32_P(GENERAL_PWRMGT, BACKBIAS_PAD_EN | BACKBIAS_DPM_CNTL, in rv6xx_enable_backbias()
1177 WREG32_P(GENERAL_PWRMGT, 0, in rv6xx_enable_backbias()
1213 WREG32_P(GENERAL_PWRMGT, SW_GPIO_INDEX(R600_POWER_LEVEL_CTXSW), in rv6xx_set_sw_voltage_to_safe()
1225 WREG32_P(GENERAL_PWRMGT, SW_GPIO_INDEX(R600_POWER_LEVEL_CTXSW), in rv6xx_set_sw_voltage_to_low()
1238 WREG32_P(GENERAL_PWRMGT, BACKBIAS_VALUE, ~BACKBIAS_VALUE); in rv6xx_set_safe_backbias()
1240 WREG32_P(GENERAL_PWRMGT, 0, ~BACKBIAS_VALUE); in rv6xx_set_safe_backbias()
1259 WREG32_P(GENERAL_PWRMGT, VOLT_PWRMGT_EN, ~VOLT_PWRMGT_EN); in rv6xx_enable_dynamic_voltage_control()
1261 WREG32_P(GENERAL_PWRMGT, 0, ~VOLT_PWRMGT_EN); in rv6xx_enable_dynamic_voltage_control()
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Dr600_dpm.c267 WREG32_P(GENERAL_PWRMGT, GLOBAL_PWRMGT_EN, ~GLOBAL_PWRMGT_EN); in r600_dynamicpm_enable()
269 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); in r600_dynamicpm_enable()
275 WREG32_P(GENERAL_PWRMGT, 0, ~THERMAL_PROTECTION_DIS); in r600_enable_thermal_protection()
277 WREG32_P(GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, ~THERMAL_PROTECTION_DIS); in r600_enable_thermal_protection()
282 WREG32_P(GENERAL_PWRMGT, STATIC_PM_EN, ~STATIC_PM_EN); in r600_enable_acpi_pm()
288 WREG32_P(GENERAL_PWRMGT, ENABLE_GEN2PCIE, ~ENABLE_GEN2PCIE); in r600_enable_dynamic_pcie_gen2()
290 WREG32_P(GENERAL_PWRMGT, 0, ~ENABLE_GEN2PCIE); in r600_enable_dynamic_pcie_gen2()
295 if (RREG32(GENERAL_PWRMGT) & GLOBAL_PWRMGT_EN) in r600_dynamicpm_enabled()
Drv730d.h66 #define GENERAL_PWRMGT 0x63c macro
Dbtcd.h29 #define GENERAL_PWRMGT 0x63c macro
Dtrinityd.h172 #define GENERAL_PWRMGT 0x670 macro
Drv6xxd.h30 #define GENERAL_PWRMGT 0x618 macro
Dci_dpm.c1419 tmp = RREG32_SMC(GENERAL_PWRMGT); in ci_set_dpm_event_sources()
1424 WREG32_SMC(GENERAL_PWRMGT, tmp); in ci_set_dpm_event_sources()
1426 tmp = RREG32_SMC(GENERAL_PWRMGT); in ci_set_dpm_event_sources()
1428 WREG32_SMC(GENERAL_PWRMGT, tmp); in ci_set_dpm_event_sources()
1536 tmp = RREG32_SMC(GENERAL_PWRMGT); in ci_start_dpm()
1538 WREG32_SMC(GENERAL_PWRMGT, tmp); in ci_start_dpm()
1597 tmp = RREG32_SMC(GENERAL_PWRMGT); in ci_stop_dpm()
1599 WREG32_SMC(GENERAL_PWRMGT, tmp); in ci_stop_dpm()
1889 u32 tmp = RREG32_SMC(GENERAL_PWRMGT); in ci_enable_thermal_protection()
1895 WREG32_SMC(GENERAL_PWRMGT, tmp); in ci_enable_thermal_protection()
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Drv730_dpm.c457 WREG32_P(GENERAL_PWRMGT, GLOBAL_PWRMGT_EN, ~GLOBAL_PWRMGT_EN); in rv730_start_dpm()
469 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); in rv730_stop_dpm()
Dcypress_dpm.c92 WREG32_P(GENERAL_PWRMGT, ENABLE_GEN2PCIE, ~ENABLE_GEN2PCIE); in cypress_enable_dynamic_pcie_gen2()
94 WREG32_P(GENERAL_PWRMGT, 0, ~ENABLE_GEN2PCIE); in cypress_enable_dynamic_pcie_gen2()
227 WREG32_P(GENERAL_PWRMGT, DYN_SPREAD_SPECTRUM_EN, ~DYN_SPREAD_SPECTRUM_EN); in cypress_enable_spread_spectrum()
233 WREG32_P(GENERAL_PWRMGT, 0, ~DYN_SPREAD_SPECTRUM_EN); in cypress_enable_spread_spectrum()
241 WREG32_P(GENERAL_PWRMGT, GLOBAL_PWRMGT_EN, ~GLOBAL_PWRMGT_EN); in cypress_start_dpm()
1576 u32 tmp = RREG32(GENERAL_PWRMGT); in cypress_get_mvdd_configuration()
Dsumod.h149 #define GENERAL_PWRMGT 0x63c macro
Dsi_dpm.c3362 WREG32_P(GENERAL_PWRMGT, 0, ~THERMAL_PROTECTION_DIS); in si_set_dpm_event_sources()
3364 WREG32_P(GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, ~THERMAL_PROTECTION_DIS); in si_set_dpm_event_sources()
3389 WREG32_P(GENERAL_PWRMGT, GLOBAL_PWRMGT_EN, ~GLOBAL_PWRMGT_EN); in si_start_dpm()
3394 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); in si_stop_dpm()
3647 WREG32_P(GENERAL_PWRMGT, 0, ~THERMAL_PROTECTION_DIS); in si_enable_thermal_protection()
3649 WREG32_P(GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, ~THERMAL_PROTECTION_DIS); in si_enable_thermal_protection()
3654 WREG32_P(GENERAL_PWRMGT, STATIC_PM_EN, ~STATIC_PM_EN); in si_enable_acpi_power_management()
3787 WREG32_P(GENERAL_PWRMGT, DYN_SPREAD_SPECTRUM_EN, ~DYN_SPREAD_SPECTRUM_EN); in si_enable_spread_spectrum()
3790 WREG32_P(GENERAL_PWRMGT, 0, ~DYN_SPREAD_SPECTRUM_EN); in si_enable_spread_spectrum()
5768 WREG32_P(GENERAL_PWRMGT, VOLT_PWRMGT_EN, ~VOLT_PWRMGT_EN); in si_enable_voltage_control()
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Drs600d.h652 #define GENERAL_PWRMGT 0x8 macro
Drv770d.h139 #define GENERAL_PWRMGT 0x63c macro
Dbtc_dpm.c1380 WREG32_P(GENERAL_PWRMGT, ENABLE_GEN2PCIE, ~ENABLE_GEN2PCIE); in btc_enable_dynamic_pcie_gen2()
1382 WREG32_P(GENERAL_PWRMGT, 0, ~ENABLE_GEN2PCIE); in btc_enable_dynamic_pcie_gen2()
Dnid.h581 #define GENERAL_PWRMGT 0x63c macro
Dsid.h240 #define GENERAL_PWRMGT 0x780 macro
Dcikd.h91 #define GENERAL_PWRMGT 0xC0200000 macro
Dni_dpm.c1021 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); in ni_stop_dpm()
3501 WREG32_P(GENERAL_PWRMGT, ENABLE_GEN2PCIE, ~ENABLE_GEN2PCIE); in ni_enable_dynamic_pcie_gen2()
3503 WREG32_P(GENERAL_PWRMGT, 0, ~ENABLE_GEN2PCIE); in ni_enable_dynamic_pcie_gen2()
Dkv_dpm.c645 u32 tmp = RREG32_SMC(GENERAL_PWRMGT); in kv_start_dpm()
648 WREG32_SMC(GENERAL_PWRMGT, tmp); in kv_start_dpm()
Devergreend.h119 #define GENERAL_PWRMGT 0x63c macro
Dr600d.h1290 #define GENERAL_PWRMGT 0x618 macro
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu7_hwmgr.c189 GENERAL_PWRMGT, VOLT_PWRMGT_EN, 1); in smu7_enable_voltage_control()
979 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, GENERAL_PWRMGT, in smu7_start_dpm()
1056 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, GENERAL_PWRMGT, in smu7_stop_dpm()
1113 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, GENERAL_PWRMGT, in smu7_set_dpm_event_sources()
1118 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, GENERAL_PWRMGT, in smu7_set_dpm_event_sources()
1190 GENERAL_PWRMGT, DYN_SPREAD_SPECTRUM_EN, 1); in smu7_enable_dpm_tasks()
1195 GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, 0); in smu7_enable_dpm_tasks()
1292 GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, 1); in smu7_disable_dpm_tasks()
1305 GENERAL_PWRMGT, DYN_SPREAD_SPECTRUM_EN, 0); in smu7_disable_dpm_tasks()
3951 GENERAL_PWRMGT, STATIC_PM_EN, 1); in smu7_enable_acpi_power_management()
/drivers/gpu/drm/amd/amdgpu/
Dsi_dpm.c3840 WREG32_P(GENERAL_PWRMGT, 0, ~THERMAL_PROTECTION_DIS); in si_set_dpm_event_sources()
3842 WREG32_P(GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, ~THERMAL_PROTECTION_DIS); in si_set_dpm_event_sources()
3867 WREG32_P(GENERAL_PWRMGT, GLOBAL_PWRMGT_EN, ~GLOBAL_PWRMGT_EN); in si_start_dpm()
3872 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); in si_stop_dpm()
4125 WREG32_P(GENERAL_PWRMGT, 0, ~THERMAL_PROTECTION_DIS); in si_enable_thermal_protection()
4127 WREG32_P(GENERAL_PWRMGT, THERMAL_PROTECTION_DIS, ~THERMAL_PROTECTION_DIS); in si_enable_thermal_protection()
4132 WREG32_P(GENERAL_PWRMGT, STATIC_PM_EN, ~STATIC_PM_EN); in si_enable_acpi_power_management()
4271 WREG32_P(GENERAL_PWRMGT, DYN_SPREAD_SPECTRUM_EN, ~DYN_SPREAD_SPECTRUM_EN); in si_enable_spread_spectrum()
4274 WREG32_P(GENERAL_PWRMGT, 0, ~DYN_SPREAD_SPECTRUM_EN); in si_enable_spread_spectrum()
6242 WREG32_P(GENERAL_PWRMGT, VOLT_PWRMGT_EN, ~VOLT_PWRMGT_EN); in si_enable_voltage_control()
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/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h242 #define GENERAL_PWRMGT 0x1e0 macro

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