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Searched refs:HDMI_CON1 (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/mediatek/
Dmtk_mt8173_hdmi_phy.c46 #define HDMI_CON1 0x04 macro
232 mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN); in mtk_hdmi_pll_prepare()
235 mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_EN); in mtk_hdmi_pll_prepare()
239 mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN); in mtk_hdmi_pll_prepare()
240 mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN); in mtk_hdmi_pll_prepare()
251 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN); in mtk_hdmi_pll_unprepare()
252 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN); in mtk_hdmi_pll_unprepare()
256 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_EN); in mtk_hdmi_pll_unprepare()
258 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN); in mtk_hdmi_pll_unprepare()
292 mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON1, in mtk_hdmi_pll_set_rate()
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