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Searched refs:IH_CNTL (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dsi_ih.c33 u32 ih_cntl = RREG32(IH_CNTL); in si_ih_enable_interrupts()
38 WREG32(IH_CNTL, ih_cntl); in si_ih_enable_interrupts()
46 u32 ih_cntl = RREG32(IH_CNTL); in si_ih_disable_interrupts()
51 WREG32(IH_CNTL, ih_cntl); in si_ih_disable_interrupts()
89 WREG32(IH_CNTL, ih_cntl); in si_ih_irq_init()
Diceland_ih.c63 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1); in iceland_ih_enable_interrupts()
83 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0); in iceland_ih_disable_interrupts()
148 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, MC_VMID, 0); in iceland_ih_irq_init()
151 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, RPTR_REARM, 1); in iceland_ih_irq_init()
Dcz_ih.c63 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1); in cz_ih_enable_interrupts()
83 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0); in cz_ih_disable_interrupts()
148 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, MC_VMID, 0); in cz_ih_irq_init()
151 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, RPTR_REARM, 1); in cz_ih_irq_init()
/drivers/gpu/drm/radeon/
Dr600.c3596 u32 ih_cntl = RREG32(IH_CNTL); in r600_enable_interrupts()
3601 WREG32(IH_CNTL, ih_cntl); in r600_enable_interrupts()
3609 u32 ih_cntl = RREG32(IH_CNTL); in r600_disable_interrupts()
3614 WREG32(IH_CNTL, ih_cntl); in r600_disable_interrupts()
3736 WREG32(IH_CNTL, ih_cntl); in r600_irq_init()
Dsid.h666 #define IH_CNTL 0x3e18 macro
Dsi.c5914 u32 ih_cntl = RREG32(IH_CNTL); in si_enable_interrupts()
5919 WREG32(IH_CNTL, ih_cntl); in si_enable_interrupts()
5927 u32 ih_cntl = RREG32(IH_CNTL); in si_disable_interrupts()
5932 WREG32(IH_CNTL, ih_cntl); in si_disable_interrupts()
6057 WREG32(IH_CNTL, ih_cntl); in si_irq_init()
Dcikd.h818 #define IH_CNTL 0x3e18 macro
Dcik.c6886 u32 ih_cntl = RREG32(IH_CNTL); in cik_enable_interrupts()
6891 WREG32(IH_CNTL, ih_cntl); in cik_enable_interrupts()
6906 u32 ih_cntl = RREG32(IH_CNTL); in cik_disable_interrupts()
6911 WREG32(IH_CNTL, ih_cntl); in cik_disable_interrupts()
7065 WREG32(IH_CNTL, ih_cntl); in cik_irq_init()
Devergreend.h1235 #define IH_CNTL 0x3e18 macro
Dr600d.h674 #define IH_CNTL 0x3e18 macro
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h670 #define IH_CNTL 0xF86 macro