Searched refs:INVALIDATE_ALL_L1_TLBS (Results 1 – 13 of 13) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | gmc_v6_0.c | 402 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in gmc_v6_0_gart_enable()
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| D | gmc_v7_0.c | 517 tmp = REG_SET_FIELD(0, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gmc_v7_0_gart_enable()
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| D | gmc_v8_0.c | 627 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gmc_v8_0_gart_enable()
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| /drivers/gpu/drm/radeon/ |
| D | rv770d.h | 648 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | nid.h | 118 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | sid.h | 379 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | cikd.h | 499 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | evergreend.h | 1156 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | r600d.h | 593 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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| D | ni.c | 1304 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cayman_pcie_gart_enable()
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| D | si.c | 4303 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in si_pcie_gart_enable()
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| D | cik.c | 5501 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cik_pcie_gart_enable()
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| /drivers/gpu/drm/amd/include/asic_reg/si/ |
| D | sid.h | 381 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
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